Electronic – How big variables are stored in RAM memory

DRAM, as you said, basically consists of a storage capacitor and a transistor to access the voltage stored on that capacitor. Ideally, the charge stored on that capacitor would never decrease, but there are leakage components that allow the charge to bleed off. If enough charge bleeds off the capacitor, then the data cannot be recovered. In normal operation, this loss of data is avoided by periodically refreshing the charge in the capacitor. This is why it is called Dynamic RAM.

Decreasing the temperature does a few things:

• It increases the threshold voltages of MOSFETs and the forward voltage drop of diodes.
• It decreases the leakage component of MOSFETs and diodes
• It improves the on-state performance of the MOSFETs

Considering that the first two points directly reduce the leakage current seen by the transistors, it should be less of a surprise that the charge stored in a DRAM bit can last long enough for a careful reboot process. Once power is reapplied, the internal DRAM system will maintain the stored values.

These basic premises can be applied to many different circuits, such as microcontrollers or even discrete circuits, as long as there isn't an initialization on start-up. Many microcontrollers, for example, will reset several registers on start-up, whether the previous contents were preserved or not. Large memory arrays are not likely to be initialized, but control registers are much more likely to have a reset on start-up function.

If you increase the temperature of the die hot enough, you can create the opposite effect, of having the charge decay so rapidly that the data is erased before the refresh cycle can maintain the data. However, this should not happen over the specified temperature range. Heating the memory hot enough for the data to decay faster than the refresh cycle could also cause the circuit to slow down to the point where it couldn't maintain the specified memory timings, which would appear as a different error.

This is not related to bit-rot. Bit-rot is either the physical degradation of storage media (CD, magnetic tapes, punch cards) or an event causing the memory to become corrupted, such as an ion impact.

Each memory address references a single byte, but the internal data bus (and flash memory) of the processor is 16 bits wide. When accessing values in memory that will be used for data, this is irrelevant from a hardware perspective; it's something the compiler will deal with. When accessing values in memory that will be executed, i.e. are machine code instructions, the processor has to make sure that the instructions are always aligned to an even-numbered byte address. It does this by enforcing a constraint on the PC (Program Counter) register that it must always be even (bit 0 of the PC probably isn't actually implemented as a DFF at all, just hardwired to logic 0). Instructions have to be on even byte addresses because the processor has to be able to read the entire instruction in a single operation from a single 16-bit wide memory location. If the instruction was on an odd byte address, it would be half in one memory location and half in another. The processor would need to be considerably more complex to deal with that possibility; it's simpler (and, ultimately, cheaper) for the processor designer/manufacturer to accept the tradeoff of less complexity in exchange for the processor only being able to deal with even addresses for instructions.