Electronic – How does USB 3.0 negotiate power states

USB ID Trace >> 6 mil gap>> USB D+>> 10 mil gap>> USB D->> 6 mil gap>> USB VBUS

This doesn't sound like a good idea. I'd recommend for other traces, like VBUS and USB_ID, to be further away from D+/D- than D+ and D- are from each other.

Wit 10 mil spacing and a 4-layer board, it's also unlikely that D+/D- are actually working as a closely coupled differential line. This is okay, but you need to think of these traces as two independent single-ended lines that happen to be carrying complementary data. That means it is also a good idea for the potential interfering signals (VBUS, ID) to be further from the high-speed traces than the high-speed traces are from the ground plane. Preferably, if the trace height above the ground plane is h, the other traces should be at least 3 or 4 x h from the high-speed traces.

Note that for USB 2.0, with data rates of 480 Mb/s, your 2-inch (5 cm) traces are approaching the length where transmission line effects begin to matter. It would be good practice to lay them out with the correct width to function as 50-Ohm microstrip lines in your stackup. But again, you're just barely reaching the lengths where this is necessary, so I wouldn't pay extra for your fab shop to guarantee controlled impedance, and if you can't strictly adhere to every best-practice for high speed layout, you will probably still be okay.

I moved the VBUS line onto the bottom layer and far from the D+ D- lines.

This will also be effective for reducing/eliminating interference with the high-speed traces.

universal protocol that is used by the likes of USB audio

Sounds like the USB Audio Class specification.

Is this conversion from output of ADC to USB data stream something which we can do, say, with a microcontroller?

Some USB microcontrollers - NXP LPC17xx for example - have example code for USB Audio Class available.