Electronic – How is an XOR with more than 2 inputs supposed to work

digital-logic

I've just started studying computer engineering, and I'm having some doubts regarding the behavior of the XOR gate.

I've been projecting circuits with Logisim, whose XORs behave differently from what I've learnt. To me, it should behave as a parity gate, giving a high output whenever the inputs receives an odd combination. It doesn't, though, for more than two inputs. How should it behave?

I also read in a book that XOR gates are not produced with more than two inputs. Is that correct? Why?

Best Answer

There are different points of view regarding how an exclusive-OR gate with more than two inputs should behave. Most often such an XOR gate behaves like a cascade of 2-input gates and performs an odd-parity function. However, some people interpret the meaning of exclusive-OR more literally and say that the output should be a 1 if and only if exactly one of the inputs is a 1. I do seem to recall that Logisim uses the latter interpretation, and somewhere in my rusty memory I have seen it in an ASIC cell library. One of the the international standard symbols for an XOR gate is a rectangle labelled with =1 which seems to be more consistent with the "1 and only 1" definition.

EDIT: The definition of exclusive-OR as "1 and only 1" is uncommon but it can be found. For example, IEEE-Std91a-1991 gives the symbol for the exclusive-OR on p. 62 with the note: "The output stands at its 1-state if one and only one of the two inputs stands at its 1-state." For more than 2 inputs the standard recommends using the "odd parity" symbol instead. Web sites that discuss this confusing situation include XOR: The Interesting Gate and gate demos at TAMS. A google search will also turn up sites that claim that, strictly speaking, there is no such thing as an XOR gate with more than two inputs.