Electronic – How many ground and power pins to have in a connector

connectorgroundlayoutpinspower

I'm designing a daughter board for a project. There are 35 I/O pins that need to go to the board. How do I determine the number of ground and power pins to include? How do I determine the placement of those pins throughout the connector?

I know something like this would be bad, as I was told:

P IO IO IO IO IO IO IO IO IO IO IO IO IO IO IO IO IO IO
G G  IO IO IO IO IO IO IO IO IO IO IO IO IO IO IO IO IO

I'm guessing something like this isn't much better:

P IO IO IO IO IO IO IO IO IO IO IO IO IO IO IO IO IO IO G
G G  IO IO IO IO IO IO IO IO IO IO IO IO IO IO IO IO IO P

The board is for a microprocessor, I'm going from a breadboard to a PCB and am trying to learn as I go 🙂

23 pins are address lines, 8 data lines and 4 signal lines (Read, Write, Chip Enabled and Direction). There is no clock line on this board but there might be on others I'll be making. The clock of the microprocessor will be 50MHz or less, down to <1MHz. The connector itself will be a standard .1" pins.

Best Answer

There's a great book from Henry Ott that covers this -- unfortunately I'm on vacation so I can't take a picture of the relevant diagram. The book is Electromagnetic Compatibility Engineering.

Here's some quick points though:

  • from a DC power point of view, how much current does your device require? Look at the rating of each conductor, de-rate if necessary to give yourself margin and choose accordingly the number of power pins. Remember you need 1:1 power to ground.
  • from a AC POV, you want to minimize the loop return area of all of your signals. You want each signal to have its own GND / return immediately adjacent -- two schemes to do this:

S G G S G G S G G S G G S (one-two ground per signal, no adjacent signals)

G S S G S S G S S G S S G (one ground per signal still, more efficient utilization of space).

The idea is to minimize crosstalk and radiated emissions. While DC follows the path of least resistance, AC follows the path of least impedance. In this case, providing a return path immediately adjacent to a signal will help minimize the size of the overall current loop, reducing your radiated emissions.

Additionally, are these all single-ended? Differential? Expected signal rate? Expected edge rates?

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