Electronic – How to decouple two 555s from each other

At least for this capacitor you seem to be able to place it on the top layer. If you would place it there at the same coordinates you would shorten the distance between cap and IC pins by at least 80% (you also have to calculate the PCB's thickness). I would definitely try to do so. You can even move it a bit closer. Don't listen to Russell :-) when he says that it doesn't make a difference if you need the via anyway; it's the distance between cap and the \$V_{DD}/V_{SS}\$ pins that counts.
Also, depending on the CPLD's power needs the 10nF may be a little bit small, though this might be more of a problem for FPGAs than CPLDs. Depends both on the number of gates and the clock frequency. Still, when I use a 10nF cap I place a 1\$\mu\$F cap in parallel, with the 10nF the closest to the pins.
Daisy chaining your loads on a single power trace is not a good idea. Instead make the power supply's output a star point and connect your different devices on different traces, each with their own decoupling.

edit
Your third screenshot is definitely the best, decoupling-wise. (I would even let the traces go straight down.) I see no problem with the ground plane, nor with vias connecting to it. Just don't place the via between the cap and the CPLD pins. Distance caps-CPLD should be very short, if possible even shorter! :-)

edit 2
I didn't pay attention to the package first, but your fourth screenshot makes it obvious: your caps' packages are huge. I see Mark made a note about it as well, and I agree with him: switch to a smaller size. 0402 is pretty standard these days, and your PCB assembly shop may do 0201s as well. (AVX has 10nF X7R in 0201 package.) A smaller package will allow you to place the capacitor closer to the IC, yet still leave room for neighboring traces.

Further reading
Choosing MLC Capacitors For Bypass/Decoupling Applications. AVX document
Using Decoupling Capacitors. Cypress document

Without knowing what your power supply configuration is, I can offer a few suggestions with reasonable caveats.

• If you need to ensure that there is no overlap between your current two transistors and the third, then your circuit will be more complicated than a few more 555's. You're then looking for something called a "dead time generator" and you probably would need to define your minimum dead time requirements.

• If you are driving MOSFETs directly, and VDD for the 555 is the same as the load you are switching, you can use a PFET instead of an NFET, and that will work reasonably well. This will not work if your 555 is powered separately from your load. This is the simplest option and requires no additional parts. See schematic below:

^{simulate this circuit – Schematic created using CircuitLab}

• If you need to use all the same type of transistor (all NFETs or all PFETs) then the next best thing would probably be to use an inverter (or other integrated logic gate) that comes in a small package. This makes for a small circuit and easy to troubleshoot. If you're set on through-hole or breadboard-able parts, then there are a lot of chips with 6 inverters on them that will work great. Tons of options exist if you can live with some flavor of surface mount (you can have as few as 1 inverters in a package). This also has the advantage of working if your load is switched from a different VDD than your 555.

^{simulate this circuit}

• You could also use 555's to synthesize any logic function, such as an inverter.

^{simulate this circuit}