Electronic – How to decrease noise while maintaining bandwidth and gain in the Transimpedance amplifier

amplifierphotodiode

I'm a photonics student trying to develop a Transimpedance amplifier for use as a drop in replacement in a photo-detection circuit. I've run in to a wall while designing the circuit. I want a Bandwidth from around 5kHz to 2GHz, a 26dB+ gain and a noise figure around 3-4dB, but no matter what I try I can't get my noise figure below 20 when modelling in Multisim.
Circuit I've made so far

Noise In/Noise Out Figure from multisim

An help in figuring out what I can do would be greatly appreciated. I'd also like to know how I could get rid of the 10 Mohm resistors, but the circuit doesn't seem to work right without them.

THANKS!

Best Answer

First, lets not worry about the gain, but lets get the delta-charge from the photodiode converted into a healthy, buffered delta-voltage on output of a first stage. Assume the 20pF of PhotoDiode sets the total (sqrt(kt/c) noise floor, which is 7microvolts RMS. Your signal is 50uVpeak, or 25uV above or below some detection threshold. What can we do with that?

Let's bias a CE NPN bipolar at 26mA, providing GM of 1amp/volt or 50uA/50uV. Assuming the collector resistor is 100 ohms (low in value, so we have some legit hope in reaching 2GHz BW), our output delta-voltage is 50uA * 100 ohms, or 5 milliVolts. [by the way, 1pF and 100 ohms is 100pS, or 1.6GHz F3dB]

Put an emitter follower on that, running at 10mA so Rout is 2.6 ohms, and AC couple THAT into a copy of the first stage, producing 500 millivolt output.

With nary a TIA in sight. The 2SC5646A has 12.5GHz Ftau at 3 volts and 15mA, with Cob of 0.5pF typical.

schematic

simulate this circuit – Schematic created using CircuitLab

Caveats: (1) the photodiode capacitance may cause oscillation of the CommonBase Q1. If so, solder SurfaceMount 10Ohms directly under the transistor base. Literally lift up the SOT-23 base lead and slip a 10 Ohm under that lead. (2) for more speed, boost VDD; or reduce R1 to 50 Ohms; R1 has 0.5 + 0.5pF in parallel (COb Q1, Cob Q2), or 100picoSec tau, only 1.6GHz. (3) reduce the transconductance_setting resistor [we want gm of 1/1_ohm] to 33 or 24 ohms, and reduce the pot base voltage; this provides more Vce on Q1 for higher bandwidth. (4) circuit has little headroom on Q2, so may saturate; consider reducing the lower collector resistor for more headroom.

What do we (think we) have here? Collector tau of 100 ohm * 0.5pF (only 1 of the Cob loads) or 50 picosecond Tau, supporting 15GB/sec datarates. With 20uA input, we get 100 ohm * 20uA = 2 milliVolts output (from Q1 collector, Q2 emitter) at 2.6 ohms Rout, or ~~ 50x the current as the PD provided.

We can trade off gain for bandwidth, increasing R1 to 200 ohms with 100pS tau. That requires using 6 volts VDD and reducing Remitter of Q1.