Electronic – How to indicate pin 1 on a SMT package footprint without silkscreen

Looking briefly at the layout, it looks OK. You seem to have generally followed the advice. The following are things that I would do differently, but are not actually problems with your board:

• I prefer to err on the side of thicker tracks, especially on a board with this much free space. E.G. For most chips, I would make the tracks as thick as the SMD pads.

• Where decoupling caps connect to chips, I like to make the tracks as thick as the capacitor pads. Sometimes you need to use two or three tracks in parallel to achieve this.

• I tend to spend a couple of days fiddling with the board, tidying up tacks, pushing things around, making things symmetrical, especially where crystals connect to chips. I like to make those perfect if I can. No reason, I'm just anal.

• I think the bottom side can be tidied up a little, especially under the main chip. Some of the tracks there are taking quite indirect routes.

• One last word of advice. Check and check again all of the connectors. Check that you are using the correct gender, and that everything is the right way round. Even after laying out PCBs for more than 10 years, this is still something I get wrong.

Aside from those, I don't immediately see any reason why it wouldn't work. The length difference between the USB data lines is probably too short to be a problem. I haven't used USB before to know.

The layout you showed looks like what's called copper-backed coplanar waveguide (CBCPW). That means the ground return for the waveguide is not just in the coplanar grounds (the ground fills on the same layer as the signal traces) but also in the plane layer immediately "below" the signal layer. This structure is fairly esoteric, in the sense that I've only seen it used in digital systems when data rates exceed 20 Gb/s.

I found what looks like a reasonable discussion on the differences between CBCPW and microstrip in a Microwave Journal article by Rogers Corp engineers.

This article shows that the CBCPW has lower loss than microstrip at frequencies where radiation loss becomes important in the microstrip, roughly from 25 GHz and up, which explains why CBCPW is not widely used at lower frequencies.

Addressing your question, the article points out some special requirements for grounding vias in CBCPW structures:

For proper grounding, CBCPW circuits employ vias to connect the top-layer coplanar ground planes and the bottom-layer ground plane. The placement of these vias can be critical for achieving the desired impedance and loss characteristics, as well as for suppressing parasitic wave modes.

This basically means that without frequent stitching vias between the coplanar ground and the backing ground, power could be transferred to undesired propagation modes, which would cause either excess insertion loss or strong dispersion in the transmission line characteristics.