I have a pretty complicated schematic in LTSpice (at least it is the most complicated schematic I ever tried to simulate in LTSpice).
For some reason simulation of just 20 ms turns into about 15 seconds to accomplish.
I have several theories:
- The schematic is complicated, computer is slow (it is really not very powerful) so I can not expect anything faster.
- I have some trouble in the schematic cosing LTSpice to short the iterations and therefore – slowdown the simulation process.
If I'd skip the first, how can I trace down the problem part of the schematic?
I tried:
- cut some suspicious parts of the schematic to define if the simulation became reasonably fast (did not help – simulation time vary from something 10 to 20 seconds)
- put initial conditions to "charge" capacitors to intended voltages (it helped as I could make the simulation time shorter: 20 ms instead of 100-200 ms)
-
I put 10 MOhms resistors between optos and ground
Is there any method to find a problem node?
I think that I will not ask the community to find the problem for me as I'd better learn to do it myself. So this is why I did not put my schematic in the question.
Best Answer
Imposing a timestep does not make it faster, and if you need speed and accuracy, I'm afraid that's not very possible.
There are some TVSs in series, quite a lot of them, which can be replaced by one TVS with
n=X
(= the number of series elements). If we're at it,m=Y
will set the number of parallel devices. Note that onlym
is valid forRLC
s,n
only for diodes. This can simply be added after the instance name. For example, two series and three parallel 4148s will look like1N4148 n=2 m=3
. They will not count towards the final node count because they're expanded internally, but they will count towards the computation, since LTspice still has to compute the presence of 6 diodes.For the floating
V5
, if that is one offending element (which could be, since LTspice even specifies in its manual that current sources are recommended over their voltage counterparts and voltage sources should be tied to ground for best performance), the cure is simple: addRser=1m
. This will transform, also internally, the voltage surce into its Norton equivalent, thus improving convergence.You can also combine series
RL
withL Rser=x
, same for caps, same for parallel and/or series combinations. Same explanation as for the TVS.As for settings, you're better off making
trtol=3..7
instead of the others. There will be a (minor, -ish) speedup, depending on your hardware and schematic, while the precision doesn't have tham much of an impact asgmin
,reltol
andabstol
have.There is one more thing that puzzles me: in one of the comments, someone suggests using current sources instead of optocouplers, and you say you tried. This makes me think accuracy, or keeping to a quasi-real setup, is not that important to you, which means you could simplify the
LC
filter afterV5
into it's simpleLC
lowpass (i.e. don't make it a symmetric filter), but the biggest simplification can be done to the whole bridge and its control circuitry: you can simply use someG
(orE
) sources driving the native switchSW
. TheSW
may need some anti-parallel diodes. Speaking of which, you can also replace the diodes with the idealized version, having.model D D Vfwd=0.7 Vrev=1k Ron=0.1 Roff=10Meg epsilon=100m revepsilon=50m
, orVfwd=0.5
for Shottky. I see two anti-parallel diodes, those could be replaced by only one diode withVfwd=Vrev
. Zeners also withVrev=X
. Of course, all these imply using an idealized, or a behavioural approach to all your schematic and, while it's very plausible and used for quick tests, you should not forget that the downside is the unrealistic results, even when modeled with great care. You could get good results, but they shouldn't be relied on, as even a schematic made with "real" elements is only a SPICE simulation using models that, themselves, are approximation of real-life cases. Of course, ultimately, it falls on you to choose your way.