Electronic – In VHDL, what is the difference between “downto” and “to”


Are there differences between

 (x downto y) and (y to x)?

Where should we use (x downto y)? Same question is for (y to x).

Notation : x and y are integer

Best Answer

This is where you can tell that VHDL was invented by a government committee. If VHDL was designed to be consistent then what you're referring to as "to" would be called "upto"-- as in the opposite of "downto". In this answer I will refer to "upto". Just understand that I'm using this term for clarity-- it still isn't an official VHDL keyword.

Vectors, or arrays, can have a range that is decending or assending. For example:

signal foo :std_logic_vector (7 downto 0);
signal bar :std_logic_vector (0 to 7);

This is strictly a numbering convention and has little to do with the resulting logic efficiency. Mostly, the correct one to use depends on what makes the most sense to the writer of the code.

That being said, never use "upto" unless you have to. What follows is my personal opinion, but it based on 20 years of writing VHDL professionally and 30 years of writing software:

Mixing downto and upto in the same code is always problematic. It can be done, but it requires careful planning and notation to get right. Even then, the code ends up to be difficult to read and modify later. It is very easy to confuse which signals are downto and which are upto.

Most busses are numbered using "N downto 0", where bit 0 is the least significant and N is the most significant. Because of this, downto is the most important of the two. And since we don't want to mix downto and upto, upto is given the boot. In every case where I've used upto, I have regretted it and usually ended up rewriting the code.

Understand that the use/misuse of upto mainly becomes an issue in large "programs". It makes it hard to share modules (a.k.a. code reuse), and hard to maintain and debug code. If you're just writing a page or two of VHDL then it might not matter. But if you're writing FPGA's with 30,000+ lines of VHDL then this will be a huge issue.

There are only a few downsides to only using downto. But the downsides are tiny compared to the problems I've encountered mixing downto and upto.

As a side note: The guy who decided to make the PowerPC busses reversed (with bit 0 being the most significant bit) should be tar'd and feathered. Or at least forced to watch Richard Simmons 24x7 while in solitary confinement. Just sayin.