Electronic – Integral non linearity in ADC

adc

I am trying to understand the parameters in an ADC datasheet. The precise parameter being the INL(integral non linearity). Now, I was going through this website INL website.

ADC error.
Now, there is another website that shows the ADC error of a 12 bit ADC as 0.00024.
The other website.

ADC quantisation error..

In the former it is in terms of percentage so I understand. But why a factor of 0.5 or 1/2 is present ?

The ADC I am using is the ADS62P15. In page 5 of the datasheet I see the INL defined (typical) as +/-1 (LSB). Now, is this a percentage value ?

Best Answer

You are mixing things up. There are multiple errors in AD conversion. Differential nonlinearity error, gain error, offset error, etc. For this example i'm making up a 2 bit ADC, max Vin 4V.

  1. Quantitization error: Always +/- 1/2LSB. This makes your translation function in shape of steps. Our ADC has 4 codes, 00, 01, 02, 03. If the voltage is between 0 and 0.5V it will always return a 00, for voltage between 0.5 and 1.5 it will always return 01. LSB in our case is 1V (25%).

Quantitization error

2.Integral nonlinearity error makes the ideal straight line transfer function bend. This means that some bits are larger voltage "steps" then other. One bit covers more voltage if it is lower, than if it is higher. So in INL tells you "how much does the Quantitization error" increase over the whole range of input voltage. Your datasheet says +/- 1 LSB for INL. If we say the conversion at 1/2 of the voltage range is with out error, This means you get an extra error of 1LSB at 0V and at maxV. If you don't compensate that it may induce an error of one 1 LSB. So you can't rely on the last bit. If your error is +/-1LSB in 11bit system this means 1/(2^11) or 0.048%.

Your error all together (only quant. error and INL) is 0.054%. Read more about the errors here.

INL error