I am trying to learn about STM32 programming. I started to read some references before start the programming.
I am currently reading this ST presentation.
It says:
When an interrupt request with lower or equal priority is
raised during execution of an interrupt handler, it
becomes pending. Once the current interrupt handler is
finished, the context saving and restoring process is
skipped and control is transferred directly to the new
exception handler to decrease interrupt latency.
So back-to-back interrupts with decreasing priorities
(higher priority values) are chained with a very short
latency of a few clock cycles.
What is the context saving and restoring process mentioned in the above quoted text?
If someone can explain entire STM32 interrupt process, greatly appreciate.
Best Answer
When an exception (interrupt) happens the context of what the core is doing at that moment needs to be pushed on stack, so it is possible to return to it later. This is done by a stackframe.
For an exception a stackframe looks like this:
Registers R4 to R11 are not pushed to stack unless the exception code needs them. The compiler may push/pop these registers if required. Above is the minimum amount of registers pushed by hardware, to keep things quick.
When the exception is finished, the hardware reverses the stackframe and restores the context to continue execution.
The processor can skip returning the stackframe if another interrupt is still pending. This is called tail-chaining.
More info about the Exception Model of the Cortex M0 can be found in the ARM docs.