I am designing a H bridge converter which is supplied with a 400VDC bus.
The switching frequency will be 20kHz
I want fit an LC filter to the output so that a sinusoidal voltage is produced, the operation and design of the filter is something that I have a good understanding of
My question relates to the capacitor type and dv/dt ratings
I thought metallised polypropylene capacitors were a good choice for an inverter filter capacitor and I have used them in the past with relatively low DC bus voltages (circa 24VDC)
A 400VDC bus isn't something I have much experience with my plan was to use a 680uH inductor like a Bourns 2322-RC and a 10uF capacitor like a Kemet R463W510050M1K. The cutoff frequency would be around the 2kHz mark
http://uk.rs-online.com/web/p/polypropylene-film-capacitors/8752308/
However the datasheet tells me the max dv/dt is 100V/us, my H bridge will use IGBT's so the turn on time will be quite fast lets assume it switches on in 0.1us
400V in 0.1us is a serious amount of dv/dt and the capacitor is going to be very stressed and fail in no time at all
Can anyone advise me on what the best course of action is to protect the capacitor?, I have seen commercial drives use these types of capacitors so I am wondering how they are designed to last
Do we add a resistor in series with the capacitor to slow the rise times or fit in a dv/dt filter before the output capacitor so that it absorbs the bulk of the dv/dt stresses?, I believe a MLCC capacitor would be a good choice for this but I am open to ideas and keen to understand how to make a robust design
Best Answer
The capacitor is after the inductor so the rise time of the voltage on the capacitor will be substantially slower than 0.1 us. This problem is ideally suited to something like LTSpice and would show you precise results very quickly and easily.
However, if you want a broad-brush estimation of the worst case dv/dt then think about the inductor being fed with a step of 400 volts and ask yourself what the current ramp would look like. For instance V = L di/dt so, 400 volts and 680 uH gives a current rate of change of 588 amps per millisecond.
This in turn can be assumed to flow into the capacitor and knowing I = C.dv/dt you can do a little algebra/calculus to show what dv/dt is for the capacitor. Or just trial some numbers - the first PWM pulse at 20 kHz could be assumed to be wide i.e. occupy the full 5 us of the period so the current will rise to about 3 amps and this will give rise to a dv/dt of 3/10 uF = 0.3 volts per microsecond.
It looks to me like you are well inside the dv/dt limit for your chosen capacitor but, I would just go straight to LTSpice (or your favourite sim) for confirmation.
I'm also wondering why you have chosen 2 kHz to be the resonant frequency of the invertor's filter and not something a bit lower. For instance if your inverter is generating 50 Hz, then a more feasible low pass filter would have a resonance that is logarithmically half way between 50 Hz and 20 kHz i.e. 1 kHz.