i have read in my text book that : " A flip-flop is the simplest synchronous sequential circuit. "
but it is not convincing at all since we cannot analyze or build a flip flop like a synchronous circuit .
even i asked a question about how to design a flip flop with having it's truth table .
designing a sequential circuit by having it's value table?
and the person who answered (Francesco Conti) claimed that flip flops are asynchronous circuits ?
what type are flip flops ?
EDIT
by flip flop i mean an edge triggered D flip flop .
the best definition i could find of synchronous and asynchronous circuits is here:
http://www.ee.usyd.edu.au/tutorials/digital_tutorial/part3/sa-op.htm
it states that :
Synchronous sequential circuits change their states and output values at discrete instants of time, which are specified by the rising and falling edge of a free-running clock signal
In asynchronous sequential circuits, the transition from one state to another is initiated by the change in the primary inputs; there is no external synchronization.
After Reading the proper answer i think we can say that :
if you look at a D-flipflop as a whole it's function IS synchronous
BUT since it's the building block of synchronous circuits obviously it's not possible to design it like a synchronous circuit (since then we would use FlipFlops to design FlipFlops) so it's design is like asynchronous circuits and has no algorithm.
to sum it up since the flip flops are the elements that make the transition from asynchronous to synchronous possible ; (in other words they are the building blocks of the synchronous circuits ) then they are some where between synchronous and asynchronous circuits .
their design is asynchronous since they are the first synchronous circuit to be made.(so they must emerge from asynchronous circuits and asynchronous design)
while their function is synchronous .(they change their states and output values at discrete instants of time)
Best Answer
Internally, a flip-flop (the term includes everything from simple D latches to more complex edge-triggered J-K master-slave flip-flops) is an asynchronous state machine. It is created by combining ordinary logic gates with feedback.
For example, here's one way to construct a master-slave D flip-flop:
simulate this circuit – Schematic created using CircuitLab
Each of the internal sections is a simple set-reset latch with an enable input. Because the two enables are driven with opposite levels of the "CLK" input, the output can only change state on its rising edge.
Note that while this design is conceptually simple to understand, it is NOT typical of how commercial chips (e.g., 7400-series) are constructed internally. If you study SSI/MSI databooks (the older TI books were especially good), you'll see several other ways to construct flip-flops from gates.
Once you have an edge-triggered flip-flop of any sort, you can use it (or multiple copies of it) to create synchronous state machines that only make transitions on clock edges.