A bit new to PCB design, I have to run two traces between two pins, and the best way I can think of is to have one trace go to the bottom layer through a via and then run directly under the top layer trace.
Are there any issues that can come about doing this? They're pretty low power signal traces, but can the traces affect each other through induced fields, or are the top and bottom layers generally isolated?
edit: The traces are running over each other for about 700mils. They're SPI data lines.
Best Answer
The only answer to the actual question in the title is: Maybe
Is it bad? Not necessarily, but there will be both capacitive and inductive coupling between them. How much depends entirely on the shared length, size, and the distance between the traces.
Assuming these are for example digital signals from a microcontroller at lowish speeds, it is unlikely to be a problem.
Fast signals and analog signals - then you need to tell us the specifics.