Electronic – Is this circuit from a textbook wrong

digital-logicschematicstri-statettl

(This is not a homework question.)

While reading "Digital Computer Electronics" by Albert P. Malvino, I found this circuit on page 121, figure 8-22(a). It claims to be an example of a discrete TTL tri-state buffer, but I believe it to be wrong.

Best I can tell, the output will always be either high or tristated: it will never be low. I also simulated it online, and the results agreed with this assessment. I googled for published errata, but found none.

Would people say this circuit was in error, or am I missing something crucial?

Best Answer

For true TTL tri-state operation the output must be able to pull up and down. The circuit in your book can only pull up, which is not compatible with TTL logic.

Here is a real tri-state TTL (inverting) buffer:-

schematic

^{simulate this circuit – Schematic created using CircuitLab}

When Enable is high Q3 is turned on, which turns off Q5 via D1, and Q4 and Q6 via Q1B. Q6 provides the essential pull down when not tri-stated.

Related Solutions

FPGA vs TTL – Advantages of Using FPGAs in Intro Computer Architecture

Given the goals of the class, I think the TTL approach is fine, and I say this as an "FPGA guy". FPGAs are a sea of logic and you can do all sorts of fun stuff with them, but there's only so much that's humanly possible to do in a semester.

Looking at your syllabus, your class is a mix of the logic design and "machine structures" courses I took in undergrad. (Plus, it's for CS majors. I'm all for CS majors having to face real hardware--letting them get away with writing code seems like a step back.) At this introductory level, where you're going over how assembly instructions are broken down, I see no real benefit to having students do things in code versus by hand. Doing HDL means learning the HDL, learning how to write synthesizable HDL, and learning the IDE. This is a lot more conceptual complexity and re-abstraction. Plus you have to deal with software issues.

Generally the point of a course that uses FPGAs is to practice creating logic that is useful--useful for talking to peripherals, serial comms, RAM, video generators, etc. This is valuable knowledge to have, but it seems very much out of the scope of your course. More advanced classes in computer architecture have students implement sophisticated CPUs in FPGAs, but again, this seems out of the scope of your course.

I would at the very least devote a lecture to FPGAs. Run through a few demos with a dev board and show them the workflow. Since you're at Mills, perhaps you could contact the folks at Berkeley who run CS150/152 and go see how they do things.

Electronic – Building “AND” and “OR” gates from tri-state drivers & inverters

The High-Z is a problem (unless you're doing wired-OR, which I think you're not).

To make an AND gate you need to implement this truth table:

B A  Out
0 0  0
0 1  0  
1 0  0  <--
1 1  1  <--

So suppose you connect A and /B to the input and tristate input of a buffer. That gives you the two last entries but the first two will be high-Z because /B is high. You'll need another tristate buffer tied to the first buffer, and the two cannot 'fight' nor can they both go high-Z at the same time. This should be enough of a hint.

Best Answer

Related Solutions

FPGA vs TTL – Advantages of Using FPGAs in Intro Computer Architecture

Electronic – Building “AND” and “OR” gates from tri-state drivers & inverters

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