I have the following circuit and I'd like to know about its stability :
From what I've learned from basic electronics courses, the first step is to add the parasitic capacitances.
I know there is one from the gate to the source of the transistor. In this case, Cgs is from the gate to the ground since the source is connected to ground.
Now the capacitance from the gate to the drain Cgd gives me trouble. The gate and the drain are connected so is there any point in adding a capacitance somewhere? And even if I did, where would I place it in the circuit?
I can proceed by finding the poles later but I have to place the capacitances correctly first. If there is indeed no capacitance from gate to drain in this case, then we only have one pole given by $$\frac{1}{R_d(C_1+C_{gs})}$$
Best Answer
Yes, such a circuit is always stable.
To make it oscillate you need to change the circuit such that more phase delay is introduced so by:
If you analyze the small signal equivalent of this circuit you should find that it has only one pole and such systems are always stable.
Indeed C1 is in parallel with the Cgs of the NMOS.
If you want to evaluate the influence of Cgd (it's a Miller capacitance!) then analyze this circuit by drawing the small signal equivalent circuit and analyzing it.