This may be simply a logic.ly issue. I'm trying to simulate a JK flip-flop in logic.ly/demo using two AND gates and 2 NOR gates, but the simulation does not work when both inputs are high and the clock is high (i.e. Q and Not Q does not toggle). I've set an initial state, so the S and R are working fine working, but once the J and K are high and the clock is H, the circuit goes haywire? Is it a logic.ly issue (level of complexity not quite there)?
Best Answer
The reason why the circuit is freaking out like this is because of the S/R flip-flop on the right-hand side. You might recall that an S/R flip-flop is not completely stable, because the inputs and the outputs are supposed to be either/or: Either S can be active or R, but not both, and similarly, Q or not-Q can be active, but not both. The effects you're seeing are the results of a feedback loop created in which this rule is not upheld: Both outputs turn on, creating an unstable state in which the circuit keeps "flickering" between two states.
I do not know how J/K flip-flops are really structured in the real world, but I believe you are partly suffering from the effects of computer simulation rather than working with physical devices. In the real world, a J/K flip-flop structured in this way would have some real-world propagation time as the signals pass through the gates, which might prevent this state from occurring. (This is similar to the problem inherent in the classical "bistable multivibrator" circuit, which cannot work on paper because it has two inputs which are electrically identical, but which always works in the real world because in reality, you will never have exactly the same voltage on both inputs during power-up.) - Answered by Adam Luoranen