A thermal relief pad is essentially a pad which has fewer copper connections to a plane (such as a ground plane).
A normal pad would simply be connected in all directions, with the solder mask exposing the area to be soldered. However the copper plane then serves as a giant heatsink which can make soldering difficult, because it requires that you keep the iron on the pad longer and risk damaging the component.
By reducing the copper connections, you limit the amount of heat transmission to the plane. It follows of course, that with reduced copper conduction paths, you also have greater electrical resistance. The increase in resistance is marginal compared to the reduction in thermal conductivity.
This should not be a concern unless the pad is carrying high current such that the four traces (on a standard thermal relief) together are insufficient to carry the current; or if it is for high frequency signals where the thermal relief may cause unwanted inductance.
Just to show a visual on normal vs thermal relief pads:
The pad at left is connected to the copper plane (green) in all directions whereas the pad at right has had copper etched away such that only four "traces" connect it to the plane.
Just for fun, I used a trace resistance calculator to estimate what the electrical resistance difference might actually be.
Consider the thermal relief pad. If we assume the four "traces" to be 10 mil wide (0.010") and approximately 10 mil in length from the pad to the plane, then each of them has a resistance of about 486μΩ.
The four "resistors" in parallel would give us a total resistance of :
$$R_{total} = \frac{1}{\frac{1}{486\mu\Omega} \cdot 4} = \frac{486\mu\Omega}{4} = 121.5 \mu \Omega$$
If we approximate one empty space created by the thermal relief to have the equivalent of about three such traces, giving us 16 in total:
$$R_{total} = \frac{486\mu\Omega}{16} = 30.375 \mu \Omega$$
Remember these values are micro ohms or \$0.0001215\$ and \$0.000030375\$ ohms, respectively. So by rough estimate, the difference in electrical resistance between our two hypothetical pads is a mere 91.125μΩ.
The thermal properties, on the other hand, are significantly different. I don't know thermal conductivity formulas very well, so I won't try to calculate it. But I can tell you from experience that soldering one versus the other is highly noticeable.
Values calculated assuming a 1 oz copper layer.
OSH Park have some guidelines which answer your 'cream layer' question.
The answer is no, you only include layers that they will use for manufacture.
I have always found Laen at OSH Park is extremely helpful and supportive, so I recommend you email if you have any concerns.
As for cutouts, it depends a little on how you are making the slot.
I have used overlapping drill holes (not allowed at many PCB manufacturers, but OSH Park did it). Otherwise I have put slots on an outline layer.
OSH Park have extensive help under Support, for example creating slots is explained here.
For any devices which have pads under the package, I do extend them beyond the package boundary. Otherwise it is difficult to solder.
In general I don't make pads larger, but I often use Sparkfun libraries (at least for packages and footprints) which are pretty good.
Best Answer
The nature of the Kelvin measurement is that you have a separate current path and measurement path so that no current (except leakage and bias currents) flow through the measurement conductors.
Thus, the PCB layout (unless the design itself is faulty) is remarkably easy, and I don't expect you'll have any troubles, since series resistance hardly matters.
simulate this circuit – Schematic created using CircuitLab
In the above schematic, the exact value of the resistors R1, R2, R3, and R4 hardly matter, provided they are reasonably low. R4 affects the common-mode voltage the instrumentation amp sees, R1 and R2 affect errors due to input offset current (and noise) a bit, but really the PCB layout is not very important until currents and voltage drops start to become significant wrt the common mode range of U1. So you want to keep the voltage drop across R4 reasonably low (not a problem typically unless you use very thin traces and/or very high currents).