I would probably use two bits to encode the three switches, and the general approach would be to have a string of pairs (one for each bit) of D or JK flip-flops to accept the sequence of input digits, essentially a shift register for pairs of bits. Then there would have to be de-bounce circuitry for the switches, and some way to generate a clock signal from the key presses (probably on release) to shift the digits through the register. Finally, XOR gates between the stages of the shift register and the digits of the key (hardwired to 1231 or use switches, etc) would produce signals to indicate when each digit is a correct match (logic Low on match), and then a multi-input NOR of the XOR outputs would give a final output signal that would indicate when the entire sequence in the shift register matches the key.
Serial/parallel-load shift registers and bit rotations are going to work most naturally with a D flip flop, since they just send data straight through; binary counters are going to work most naturally with a T flip flop, since each counter bit Ck = Ck,previous XOR carryk, where carry is the carry bit from the previous stage.
If you look at JK flip-flops, however, they are the "universal" flip-flop that can act as a D- or T- flip-flop depending on the input signals.
To get a D from a T, or vice versa, you need an XOR gate. To get a T from a JK, you just tie the JK inputs together. To get a D from a JK, you need an inverter, as the J/K inputs need to be opposites.
In your application, you've got enough complexity, that I suspect the gate counts are going to be very close, and it's probably not worth worrying about -- unless you have to optimize, in which case you'll just have to try it for each case.
IMHO, the D flip-flop is conceptually the simplest to use, and it works naturally with most of your operations, so I'd start with that.
Please use the logic symbol! The IC is not relevant to the schematic, where it's about the circuit's functionality.
Most EDA (Electronic Design Automation) software will let you create a component consisting of a package for the PCB layout, and a logic symbol for the schematic capture. For a quad AND gate you'll have either 4 identical AND gates and a symbol for the power connections, or 3 common AND gates and one with power connections.
When placing AND gates on your schematic you'll start with gate 1 of IC U1. Next gate you place will be gate 2 of U1, and so on. This way you can place each gate anywhere you want, one at the top left and another one of the same IC bottom right if you want. Making physical connections is a problem for later, when you make the PCB layout.
If your schematic symbol would represent the package you would have to draw all connections for your gates to the same symbol, whether they belong together or not. Your schematic will become illegible. For the PCB that's not a problem; it's not meant to read the schematic from it.