The main problem with diode logic is slow rise time due to the (relatively) weak pull-up in combination with the ever-present stray capacity in your circuit (assuning a wired AND circuit). The use of a buffer transistor might get you into slow switching due to saturation. I don't think you will get into (addiotional) trouble from the less-than-perfect switching characteristics of your diode.
If you want to cut PCB size consider using some of the very small one-gate-per-package chips. OTOH, if you realy are a masochist, go for all the trouble you can find! But that does not match with asking here...
So impunity: NO. Check your timing margins, if you have a few us to spare I guess brew-it-yourself logic might work. Below 100ns I would not try it.
The question seems rather confused in several respects...
1) It is unclear whether you want to implement 3-state logic or an open-drain interconnection.
In the former, the driving device DOES use a push-pull output, driving 0 or 1 onto the bus. The other devices, meanwhile, must abstain from driving until some separate system signals that it is their turn.
In the latter, the bus is always pulled to '1' by a resistor, and any device may pull it to '0'. In this case, there is no harm done if several devices drive the bus simultaneously, though any messages may be corrupted.
2) You say you want a "floating" bus to indicate that the bus is free. In neither case is this normally possible (there is no logic primitive that can detect that a bus is floating). This is why in tri-state logic there must be another system (bus arbitration logic) to keep track of who has the bus, and give each device a turn.
Now as to the specific question of transmission gates : either of these systems can be trivially implemented using transmission gates, though there are other and sometimes better ways.
Tri-state logic can be implemented using a normal push-pull (totem-pole) output, and a transmission gate between the push-pull output and the bus. The bus arbiter simply switches the transmission gate on or off.
It is often more economical to turn off both transistors in the push-pull output instead.
Open drain logic can be implemented with a transmission gate by simply connecting one side of it to ground, and the other to the bus. Now simply turn it on to pull the bus low.
Best Answer
In that context, 'large driving capacity' means sufficient output current to drive typical loads at something approaching the full speed of that logic family's gates.
Examples of typical loads are:
(1) A number of input stages of the same/similar logic family. The maximum number of loads ('fan-out') depends upon the logic family but generally improves with newer families. Guide numbers are only 5..10 loads for early families up to 1000's for later families (refer to family specs' for specifics). A further limit is the capacitance of an increasingly large number of longer interconnecting tracks with stubs at each gate, which will reduce signal speed and/or raw signal quality.
(2) Parallel buses of control and data signals with timing related o each other (e.g. memory bus, multi-board interface bus). Again, larger/longer interconnecting tracks will increasingly reduce signal speed and/or raw quality.
(3) Line driver/buffer circuits. For outputs at different signalling standards (e.g. communications, displays) or controlling higher-power loads (e.g. solenoids, motors, lights).
There's plenty more that could be written on the subject but this illustrates the point for your further reading.