I'm simulating this circuit in LTSpice:
The input is a 1 Mhz square wave with 10 ns rise and fall times. Plotted are the input, output as well as transistor base voltage.
Now here is what happens if we replace the Schottky by a 1N4148 silicon diode model:
It is substantially nicer! The rise time is much more steep, leading to a nice flat top. Furthermore, the off voltage is closer to zero. This niceness is also more robust against component changes.
If the simulation were realistic, why would we ever use Schottky clamps, so it can't be right.
What is wrong in the simulation?
Is it that this type of Schottky is not appropriate for the circuit (being a large-ish rectifier diode?) Or something else?
Update: Indeed, the issue with the rise time is simply that the Schottky model is a heavyweight. Scrolling through LTSpice's list of available Schottky diode models, I found one BAT48WJ. The results with this diode look a lot more reasonable in terms of rise times:
Still, the question remains is the result with the 1N4148 realistic?
Best Answer
Here is the real behavior of almost the same circuit, installed in a real device.
The differences are that the driving source impedance is unknown (V1 is ideal in the simulation), and the load impedance corresponding to R3 in the diagram is unknown.
The behavior is nowhere near the rosy picture painted by the simulation. (On the other hand it is good enough that the everything works in the DUT).
The horizontal divisions on the graticule represent 500 nS intervals. The upper trace is the transistor's collector: one division is 5V. The bottom trace is from the base: one division is 2V. As can be seen, the rise time is quite slow, taking over 500 nS to rise to more than 90%. What might be considered a solid high logic level is probably not established for some 250 to 300 nS.