Now that question will open a can of worms! Basically, there is no way to accurately answer that question because there are so many factors involved. That being said...
The "quick" answer is that I wouldn't be concerned until the signal frequencies get near 1 MHz. Between 1 and 10 MHz I would be extra careful. And above 10 MHz I would have a PCB made. Of course there are exceptions, and this is what I would do, etc. But as a rough order of magnitude place to start, it works.
There are many issues involved with this, and I'll try to cover them here...
As others have stated, it's not the signal frequency but the rise/fall time of the signal edges. If you can slow down the edges (but not too much) then you'll have an easier time. FPGA's are great for this because you can change the slew rate and drive strength of the I/O Pins. In a synchronous system, this is more important on the clock lines than the data lines (I'm not saying that data isn't important, however.)
While doing proper signal termination is important, you can't do signal termination without knowing the characteristic impedance of the wire. And in a breadboard type system you won't know what the impedance is, no matter how hard you try. In this case, you'll simply end up twiddling with it until it just happens to work.
Pay attention to the signal return paths and loop currents. This is going to play the biggest part in making the system run fast. Of course, this is damn near impossible to do correctly with a breadboard, but those are the breaks. This is why people use power/gnd planes and 4+ layer PCB's.
I've ran PCIe (2.5 GHz) over wire-wrap-wire for about 5 inches. And I've ran PCIe over a "commercially available" wire for 12 inches. So you can get good performance from wire. It's all in how you use it.
A good breadboard can probably run faster than a bad 2-layer PCB.
Of course, most modern parts are in packages that require a PCB.
Concerning the fact that Q dropped when you used an impedance matching network:
You used a simple L matching network consisting of just two components (a capacitor and an inductance) which both are completely determined by the input and output impedance of your situation.
This leaves you no parameter to control Q. You get whatever Q is a result of the component values you need for matching.
So I suppose what you need is a more sophisticated matching network containing at least three components (e.g. a T- or a Pi-network) that has another degree of freedom which allows you to control not only input and output impedance but also Q.
Since you are also asking for references I recommend very much the chapter about impedance matching and Smith charts in Chris Bowick, "RF Circuit Design". It explains and contains an example problem for impedance matching while also caring about Q.
Best Answer
Selecting suitable parts values is ONE problem, which - however - could be solved in this case. The bigger problem is to find a suitable operational amplifier. A Wien-type oscillator needs a gain of three - and to achieve this (without disturbing phase shifts) for a frequency of 160 MHz requires an opamp with a gain-bandwidth product of at least several GHz. Therefore, I recommend to try one of the classical transistor-based oscillator topologies.
EDIT1: Another problem connected with the use of opamps is the limited slew rate of these devices - even if you could find an opamp with the required gan-bandwidth product.
**EDIT2:**There are some special opamp topologies which can be used for an 160MHz Wien oscillator: Current-feedback amplifiers exhibit very large gain-bandwidth products and phantastic slew rates (SR). Example: OPA695 allows a gain of three at 160MHz with a slew rate SR=4300V/µs.