Electronic – Managing addresses of interrupt service routines and functions of the program in cortex M0

cortex-mcortex-m0interruptsprogramming

I am working with nordic nRF51422 uC with cortex M0 core and I have to store data in Non-Volatile Memory but to do that properly I need information where exactly code of the program is stored in flash.

The vector table is fixed at address 0x00000000 and it tells me the start of each interrupt service routine I have implemented but I struggle to find information what is the length of each ISR. It would be also useful to know where each function of the program starts and ends.

Summarizing, is there any easy way to spy how the code of program is mapped into flash? Is it compiler dependent? Can I set my own boundaries for each function? Are there any mechanisms that enable dynamically checking end address of the code while executing program on uC ?

Best Answer

The common approach is to make a const array that contains the appropriate values (initial SP, initial PC = adress of init code, addresses of the interrupt service routines) and use some compiler-dependant magic to force the linker to place this array at address 0.

An example in gcc (from my http://www.voti.nl/bmptk):

void (* const __vectors[ 8 ])(void) 
__attribute__ ((section(".vectors"))) = {
   (void (*)(void)) & __stack_end,  
   __startup,
   // interrupt verctors etc.
};

The __ attribute__ ((section(".vectors"))) marks this array as part of a section called "vectors". The matching linkerscript ensures that that section is placed first in the flash memory:

MEMORY
{
   rom (rx)     : org = ROM_START, len = ROM_SIZE
   ram (rwx)    : org = RAM_START, len = RAM_SIZE
   nul (rwx)    : org = 0x20000000, len = 0k
}
. . . 
SECTIONS
{
   .text :
   {

       . = ALIGN(4);
       KEEP(*(.vectors));
       . . .
       # other sections come here  (= the rest of your code)

In normal situations this is something that your tool vendor/builder/creator has done for you.

Related Solutions

Electronic – Interrupt Service Routine in C – function at specific address

You'll find the information you need in the compiler's manual: MPLAB C18 C COMPILER USER'S GUIDE.

From page 37 of the user's guide:

MPLAB C18 does not automatically place an ISR at the interrupt vector. Commonly, a GOTO instruction is placed at the interrupt vector for transferring control to the ISR proper. For example:

void lowPriorityISR(void);

#pragma code low_vector=0x18
void interrupt_at_low_vector(void) { 
    _asm GOTO lowPriorityISR _endasm 
}
#pragma code

#pragma interruptlow lowPriorityISR
void lowPriorityISR() {
}

When implementing a high priority ISR, you cannot use the interrupthigh pragma as you would expect. You'll have to use the interrupt pragma instead, as is described here.

If you can change the compiler: using interrupts is easier in the Microchip XC8 or HI-TECH PICC compilers.

Electronic – Interrupt Service Routines and I2c together

The processor won't execute any foreground code during the interrupt. If the IIC is strictly handled in hardware, then that won't matter. If this processor is the IIC master, then it won't matter either since you own the clock and can go as slow as you want (most slaves allow this).

However, a interrupt routine taking 2 ms with other things going on, like IIC communication, at the same time sounds like bad overall architecture. The right answer is to step back and understand what all the processor needs to accomplish, what limited set of things really are low-latency that it must react to, and re-architect the firmware from there. Propagating a bad design by working around previous mistakes just makes things even worse.

Best Answer

Related Solutions

Electronic – Interrupt Service Routine in C – function at specific address

Electronic – Interrupt Service Routines and I2c together

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