Electronic – multi-layer board copper pour

Good layout and grounding seems to be poorly understood out there so religion finds a foothold. You are right, there is really very little reason to use both the top and bottom of a two layer board for ground.

What I usually do for two layer boards is to put as much of the interconnects as possible on the top layer. This is where the pins of the parts are already anyway, so is the logical layer to use to connect them. Unfortunately you usually can't route everything on a single layer. Paying attention and thinking carefully about part placement will help with this, but in the general case it is not possible to route everything in one plane. I then use the bottom plane for short "jumpers" only when needed to make the routing work. The bottom plane is otherwise ground.

The trick is to keep these jumpers on the bottom layer short and not abutting each other. The metric of how good a ground plane is left over is the maximum linear dimension of a hole, not the number of holes. A bunch of short 200 mil traces scattered about won't keep the ground plane from doing its job. However, the same number of 200 mil traces clumped together to make one island a inch accross is a much bigger disruption. Basically, you want the ground to flow around all the little disruptions.

Set the auto router cost for the bottom layer high and don't penalize it much for vias. This will automatically put most of the interconnects on the top layer. Unfortunately, the auto-router algorithms I have seen can't seem to be tweaked for not clumping the jumpers. In Eagle, for example, there is the hugging parameter. Even if you turn this off, you still get clumped jumpers. Let the auto router do the grunt work, then you clean things up afterwards. Sometimes you can spot a case where a little re-arrangement can eliminate a jumper altogether. Most of your time, however, will be spent moving the jumpers apart to not make large islands.

As for power planes, that's mostly silly religion. Route the power just like any other signal, although in this case you have to consider the voltage drop due to the trace resistance, since power traces presumably handle significant current. Fortunately even 1 oz copper traces on a PCB are quite low resistance. You can make the power traces 20 mil or whatever instead of 8 mils for signal traces. In any case, the point is that the DC resistance matters but it is usually not much of a issue unless you have a high current design.

The AC impedance isn't all that relevant, which the religious folks don't seem to get. This is because the power feed is locally bypassed to the ground plane at each point of use. If you have a good ground plane, you don't need separate power planes for most ordinary designs, just good bypassing at each power lead of each part. The bypass cap connects directly between the power and ground pins, then there is a via right at the ground pin to connect to the ground plane on the bottom layer.

The high frequency power loop current of a part should go out the power pin, thru the bypass cap, and back in to the ground pin without ever running accross the ground plane. This means you don't use a separate via for the ground side of the bypass cap. Connect it directly to the ground pin on the top side, then connect that net to the ground plane with a via at a single point. This technique will help a lot with RF emissions and cleanliness in general.

In general, I would say keep the top-side pour; it certainly does no harm, and it has some secondary benefits, such as less etching required and less thermal stress on the board during reflow.

You do still need to pay attention to current loops and place the vias appropriately, not just scattering them about randomly. Since the FT232R is the only active chip on the board, focus on its outputs. There are two LEDs that are powered by V_USB, and a few outputs associated with the serial port that are powered by V_CC. Where do the currents flow when any of these outputs change state? Try to keep the paths as short and direct as possible.

Note in particular, the ground path for the USB connector in your non-pour example. It has to go down, cross below the chip, then come up on the right before it gets to the ground pins on the top of the chip. The top-side pour shortens this considerably. In either case, it would help if you adjusted the vias near pin 1 of the chip so that the bottom pour is continuous there.

One side point about your design: Try to avoid having three etches come together at an acute angle, like you have on your Vcc trace. Make that a right-angle tee connection.