I'm trying to convert a regular Boolean equation that has multiple inputs into a NAND only equation. My guess is that I'm supposed to convert using DeMorgan's law, but I'm not entirely sure how to do that. The equation I'm trying to convert is (A&~B)|(C&D).
I've created a logic circuit that implements the regular gates and its NAND equivalent:
I also have the diagrams on how a NAND gate is used to create difference gates, but still not quite sure how to convert it to an equation. I'm trying to create an equation I can implement in Vivado (if anyone has experience with that). Is there a Boolean symbol for NAND?
Any help and direction would be greatly appreciated. Thank you all so much.
Best Answer
The commonly used boolean symbols in Digital Electronics are for AND, OR, Exclusive-OR, Exclusive-NOR and NOT operations. See Wikipedia: List of logic symbols. The NAND operator symbol is Sheffer Stroke, which is uncommon in Digital Electronics.
You can convert a Boolean equation to NAND form by replacing each gate with it's NAND equivalent, but as you have seen some gates become redundant. Hence the algebraic method is preferred as it is shorter.
Taking the double complement as we know, does not modify the equation, because \$\overline{\bar{A}} = A \$.
As you mentioned in the question, you are supposed to convert the equation to NAND form using De Morgan's laws. Applying De Morgan's law is easier when you have an expression that is complemented i.e \$\overline{(some\_ expression)}\$.
But we can't just complement the expression once as that would be modifying it, so we take the double complement of the expression. This does not modify the expression and makes it easier to apply De Morgan's law.
We need to apply De Morgan's law to the inner negation operator of the expression. The outer negation operator is applied so that the equation won't be modified. And as shown in the below example, the outer negation operator will be the NAND gate at the output when the expression it operates on is the conjunction of outputs of other NAND operations.
To convert to NAND form, the method for small problems which can be solved manually:
For your question, it takes 2 steps as it is already in the minimum sum-of-products form:
\$(\overline{\overline{{A}.\bar{B} + C.D}}) = \overline{\overline{A.\bar{B}}.\overline{C.D}}\$
The circuit implementation requires 4 NAND gates.
simulate this circuit – Schematic created using CircuitLab