I'm new to discrete logic (I come from the spoiled Arduino/$1 ATTiny generation) and I'm trying to design a safety circuit that would assert FAIL on the second attempt to ENABLE the OUTPUT if the SAFETY input hasn't been disengaged(and re-engaged) after the first attempt.
Simply put, I am trying to prevent the device from running 2 times in a row without being reset via the SAFETY switch after every run.
Here is a simplified signal diagram and simulation of the circuit.
I need to create a truth table for this circuit, but I can't wrap my head around even whether this is a synchronous or asynchronous circuit, because the Clock (well Gate, or Enable, however you want to put it) is connected to one of the Inputs, and I have a monostable multivibrator on the Set of the latch, which actually changes state during the clock cycle.
Here is a more detailed signal diagram, including all the inputs and outputs that I think are relevant to analyzing the states of the circuit.
Please help me make heads or tails out of this, and if you have any optimization suggestions, I'm open for all input!
Your wisdom is much appreciated!
PS.: Thanks to everyone who commented & showed me I need to go deeper!
Best Answer
This sounds like a state machine with 4 states; let's call them READY, STARTED, STOPPED, and FAIL. And make your inputs level-triggered rather than edge-triggered if possible, it's a lot easier to understand.
It's not specified but you probably want STARTED -> FAIL when not safety (ie someone disengages safety while system is running) and some means of getting out of FAIL.
Actually mapping those into gates, deciding whether you want binary mapping or one-hot and Moore vs Mealy machine is left as an exercise.