digital-logiclogic-gates
I'm trying to work out a piece of binary logic and this is essentially what I am trying to achieve:
A B C | Output
0 0 0 | 0
0 0 1 | 1
0 1 1 | 1
0 1 0 | 1
1 0 0 | 1
0 1 1 | 1
1 0 1 | 1
1 1 0 | 1
1 1 1 | 0
I am attempting to implement this using logic gates and I have tried playing around with the NAND and NOT gates to somehow combine the two, but I am failing to get the exact logic that I am after. Any tips here would be very appreciated.
The logic that accepts and stores input is a "flip-flop". If you wish to store from either "side" you can have a 2:1 multiplexer that selects between the 2 inputs.
I think this is a solution, after playing with the expression a bit.
simulate this circuit – Schematic created using CircuitLab
Derivation:
$$ AB\overline{C} + A\overline{B}C + \overline{A}BC + ABC$$ $$ = AB(C+\overline{C}) + A\overline{B}C + \overline{A}BC $$ $$ = AB + A\overline{B}C + \overline{A}BC $$ $$ = AB + C\cdot(A\overline{B} + \overline{A}B) $$ $$ = \overline{\overline{AB} \cdot \overline{C\cdot (A\overline{B} + \overline{A}B)}} $$ $$ = \overline{\overline{AB} \cdot \overline{C\cdot (A+B)\cdot\overline{AB}}} $$ Turning the 3-input NAND into 2 2-input NANDs and an inverter: $$ = \overline{\overline{AB} \cdot \overline{C\cdot \overline{\overline{(A+B)\cdot\overline{AB}}}}} $$
Best Answer
For the general case of this type of problem, read about Boolean algebra and specifically conjunctive normal form (or its dual 'sum-of-products'). That said, this one is simple enough to do by inspection. Here's one implementation:
simulate this circuit – Schematic created using CircuitLab
From the truth table you gave, we're looking for an output that is 0 only when A=B=C.
XOR1 compares A and B for equality, XOR2 compares B and C for equality; each of their outputs is 0 when their inputs are equal.
So we want Q to be 0 only when X=0 and Y=0. An OR gate achieves that.