Electronic – negative current for discharging capacitor

capacitorcurrentnegative

So I was trying to derive the exponential decay equation for a discharging capacitor and realised that I would only get the correct answer if I used a negative current, that is to say the direction of the current opposes the direction of the voltage applied by the capacitor?(this is probably where the problem is).
Here is the equation:
$$Vc(t) – (-RC\frac{dVc(t)}{dt}) = 0$$

I have also visited links to similar questions and saw that the negative current means that the discharging current is opposite to the charging current. But what if I start with a charged capacitor? In this case am I not free to define the direction of the current in which ever way I want?
In short, I would like to clarify whether there is a potential gain or a potential drop at each of the elements(a capacitor and a resistor).

To elaborate:If I have a circuit with only a charged capacitor that is discharging and a resistor, and I perform KVL around the loop in the direction of the actual current, following passive sign convention. Do I not end up with the equation:

$$Vc(t) – (RC\frac{dVc(t)}{dt}) = 0$$
why is this equation not valid?

Best Answer

I once had the same doubt, but in short, it has to do with the passive sign convention.

This is the circuit that you have:

schematic

simulate this circuit – Schematic created using CircuitLab

See that instead of using KVL, I am using KCL for now. I defined the node \$v_o\$. I have defined my currents in the direction shown, but you can certainly choose other directions. It follows that:

$$ i_c + i_R = 0$$

And you could now plug in what \$i_c\$ and \$i_R\$ are, to get

$$C\dfrac{dv_o(t)}{dt}+\dfrac{v_o}{R}=0$$

And that's the differential equation that will give you the well known solution for a discharging capacitor.

Why does it work out for KCL and you can't seem to get it to work using KVL?

The trick is in the use of the positive sign convention. Passive devices have a positive current and voltage relationship when the 'current is going into the positive terminal and comes out of the negative terminal'

Since the current is going into the elements through the + terminal and comes out through the negative terminal then the current is positive, by the PSC.

Here is an excerpt from Nilsson-Riedel Electric Circuits book

enter image description here

So when you see the capacitor has the \$i_c=+C\dfrac{dv}{dt}\$ (notice the +), that's the definition following the passive sign convention where the current enters the positive terminal.

If you were to use KVL, take a look a the following approach:

schematic

simulate this circuit

Which is the same as the first one I drew but I added another current defintion, the one I will use for the KVL loop. I named that current \$i_s\$ (in red), and let's do KVL:

$$ v_o-i_sR=0$$

That's where you get confused. Now, you can see from the circuit that \$i_s\$ goes in the opposite direction compared to the \$i_c\$ current (definition by psc), that is,

\$i_c=-i_s\$ or \$-i_c=i_s\$

And since the current \$i_s\$ is in the same direction as \$i_r\$,

$$i_s=i_r $$

And if you plug the \$i_s\$ and \$i_c\$ relationship, you end up with the right differential equation:

$$ v_o-(-i_c)R=0$$ $$ v_o+i_cR=0$$ $$C\dfrac{dv_o(t)}{dt}+\dfrac{v_o}{R}=0$$

Hope it helps.