armassemblycortex-mcortex-m3microcontroller
I'm curious to know, are there any differences between the assembly instructions of ARM MCUs from two different corporation? For example between an Cortex-M3/4 of NXP and TI or ST or other corporations.
Some of my friends say me that they have no difference. Is that correct?
The control logic records why it issued a particular fetch to a particular address, so it can do something sensible with the result. There will be a small queue of outstanding fetches (remember, fetching from DRAM may take hundreds of cycles). On a value arriving, it's written back to the part of the architecture that requested it, and the relevant part of the processor's pipeline is un-stalled.
This is the official ARM Cortex JTAG/SWD connector diagram:
You should follow the data sheet/user manual about any resistors that are required. SWD pins on other LPC chips are usually pulled up internally.
The LPCXpresso IDE might be defaulting to the SWD interface. You need to select the JTAG interface, which is probably what the LPC4337 uses initially.
Best Answer
I think the correct thing to say is that for a given architecture, such as the ARMv7-M architecture of the Cortex-M3 core, the instruction set is the same for all processors. However, the behavior of some instructions may vary because of implementation-defined (i.e. optional) functionality in the processor. Instructions that try to access optional capabilities that are not implemented in a particular processor may cause exceptions.
To find the features that may be implementation defined, search the appropriate ARM Architecture Reference Manual for IMPLEMENTATION, in all capitals.