This was already mentioned by Russel, but I hope to present it in a different way.
The main problem here, it seems to me, is that your book (or whatever source of information you're using) missed one important point: The voltage between inverting and non-inverting inputs of an ideal operational amplifier should always be zero with this and similar setups. If we include that assumption and take a look at the circuit, we can get a logical answer.
The output of an op-amp is modelled as an ideal controlled voltage source. The input impedance is infinite and no current flows into the op-amp. So far so good. Next, we know that the voltage between the inputs is zero, so we know that the voltage with respect to ground and the inverting input is same as the one on the non-inverting input. That voltage comes from the ideal controlled voltage source at the output. Next, let's take a look at the current issue. Since we have infinite input impedance, no current flows into the operational amplifier, so from where does the output current come? Well from the ideal controlled voltage source at the output.
As I said, the voltage source is ideal, so it can source infinite current, it's controlled so you have your gain, the current is set by resistor and there's no contradiction there at all. In reality, the current will come from the power supply pins and be limited by construction of the operational amplifier, but this is a mathematical model. So let's take a look at a pretty pictures now:
The first image may seem a bit drastic:
I've crossed out the op-amp on purpose here. It seems to me that trees are obstructing your view of the forest here. If we remove the op-amp symbol and take a look at how we're supposed to model it instead (note the \$ 100 \mbox{ }G \Omega \$ resistor):
We can clearly see that the current is coming from the one terminal voltage source which is the output of the op-amp.
Next, I'll show a bit more complex version of the same circuit and explain how it degenerates into what you've shown:
Let's see what we can see here:
We've got the input voltage \$U_i\$, the output voltage \$U_o\$ and the resistors \$R_1\$ and \$R_2\$.
Now we know from our model that the voltage between the inputs is zero, so we can write following safely: \$U_i-R_1I=0\$, since the resistor \$R_1\$ has a short circuit to inverting input. From that we get the current: \$I=\frac{U_i}{R_1}\$. The current can only come from the op-amp output in this case, so we know that it is the current going through the resistor \$R_2\$ too. From that we get the equation for the output voltage of the op-amp: \$ U_o-R_2I-U_i=0\$ and after that: \$U_o=R_2 I + U_i= R_2 \frac{U_i}{R_1} + U_i=U_i(\frac{R_2}{R_1}+1)\$. From this, we have \$ \frac{U_o}{U_i}=1+ \frac{R_2}{R_1}\$. In the circuit you showed, equivalent elements would be \$R_2=0\$ and \$R_1=\infty\$. As you can see, the output current isn't a problem with this setup and again, there's no contradiction here.
With the few assumptions I've shown and few equations, you can do basic op-amp circuits without any problems. I recommend that you read from freely downloadable books Amplifiers and Bits: An Introduction to Selecting Amplifiers for Data Converters
pages 6 and 7 and from Op Amps for Everyone Design Guide
chapter 3 (or at least take a good look at the pictures there). Both books (well, a book and an application report) are by Texas Instruments (a major op-amp manufacturer) and should come up on most popular search engines as the first response.
I don't know how to proceed with this question or where to start.
If there is (net) negative feedback, then you proceed by setting the voltage across the op-amp input terminals equal to zero:
$$v_+ = v_-$$
Note that with zero volts across the input terminals, the 2k resistor in parallel with the current source is irrelevant; there is zero volts across it so there is zero current through it. You may remove it from the circuit without changing the solution.
This should get you started.
@AlfredCentauri I still don't see the bottom loop, do you mean the
loop v+ connected to VB then connected to the voltage source and then
the resistor and finally VA. Is that considered a loop even with the
op-amp? And when I do I still don't get your equation.
simulate this circuit – Schematic created using CircuitLab
This is the bottom-most loop and KVL clock-wise 'round the loop starting with the voltage across the 1k resistor is:
$$i_1 \cdot 1k\Omega -2V + V_B - V_A = 0 $$
rearranging yields
$$V_B = V_A - i_1 \cdot 1k\Omega + 2V$$
If the presence of the voltage source above is puzzling, recall that the output of the ideal op-amp is an ideal (controlled) voltage voltage source referenced to ground which I've shown explicitly here.
Best Answer
Let's start with a few labels on the schematic:
simulate this circuit – Schematic created using CircuitLab
Assuming ideal opamps and a well-designed circuit operating within its limits, you know that \$V_b=V_1\$ and \$V_c=V_2\$. So it must be the case that \$i=\frac{V_1-V_2}{2\,R}\$. (I've changed the direction.) You also know that this exact same current must also be sourced from \$V_a\$ and sunk by \$V_d\$. So it follows that \$V_a=\frac12\left(3\,V_1-V_2\right)\$ and that \$V_d=\frac12\left(3\,V_2-V_1\right)\$. The difference is \$V_a-V_d=2\left(V_1-V_2\right)\$.
(There is another important symmetry about how \$V_a\$ and \$V_d\$ surround \$V_1\$ and \$V_2\$. But that's a different topic.)
Now, this is the place where I disagree with your solution (your second diagram), which appears to assume that the magnitude of the currents in the two resistors pointed at by blue arrows are the same. On its face, such a claim should seem false. The reasoning is simple enough. You know that \$V_e=V_f\$. But you also know that \$V_a\ne V_d\$ (unless \$V_1=V_2\$.) So how is it possible to sustain a claim that the current magnitudes (ignore direction) would be the same?
Instead, just find that \$V_e=V_f=\frac47\,V_d=\frac27\left(3\,V_2-V_1\right)\$ and then easily find that \$V_o=\frac83\left(V_2-V_1\right)\$. (You can derive the currents from there, if you like.)
I also liked the link that Nedd provided in a comment. The one here. But I chose to directly address your 2nd schematic, so I wrote differently here.
(To further clear your mind, just remember that the opamps are perfectly capable of sinking or sourcing current at their output nodes. There was no need to quantify those calculations here. But you could certainly work their contributions, too.)