I'm looking for an IC with the following functional diagram. Basically it's an inverting buffer whose output is open-collector, and that has an enable signal. An equivalent logical circuit would be to replace the notional tristate inverting buffer with a "NOR" gate driving the base of the transistor. Essentially I want the output to unconditionally float when the enable pin is "low". When the enable pin is "high" I want the output to be driven low when the input is driven low and float otherwise.
Does anything like that exist? Ideally I'd power it from 1.8V (but I'm flexible on that requirement) and it would come in an SOT-5 package. Suffice it to say this is not for a new design, but rather to put a band-aid on an existing design problem (that I've inherited).
Best Answer
I think you can do this with a single chip if you use a dual NAND gate with open-drain output like 74LVC2G38 (both gates below have open-drain output):
That runs off 1.65 to 3.3 V and it's available in a 2x3 mm 8-pin package, which is pretty close to SOT-23-sized.