I've been reading about input offset voltage, bias current, and current offset for a few days now and still can't get some things straight.
I'll summarize what I understand and then pose the questions below. Please correct me if I'm wrong, it's difficult to find confirmation for these ideas.
1) Input offset voltage – Caused by mismatch in the input terminals of the opamp and specifies the voltage across the terminals that must be applied in order to get an output voltage of zero.
2) Input bias current – caused by the finite input resistance of the opamp and results in an "error" voltage drop that depends on the input impedance seen from the opamp terminals.
3) Input offset current – caused by a mismatch between the input bias currents of the individual terminals (not sure what this results in).
My questions are the following:
1) Does the input offset voltage simply add a DC component to all supplied AC signals, or is it relevant only when you want an output voltage of 0? Would one get rid of this offset voltage by simply AC coupling the input signal by adding a capacitor (and a resistor to ground)?
2) Is the best way to minimize the bias current by adding compensation resistance on the opamp terminal(s), so that the same potential difference appears across both terminals and the common mode signal rejection begins to take effect? What about when the bias signals are not matched on each terminal (which is what the input offset current specifies)?
3) What effect does the input offset current have on the output signal? Does it also introduce an error into the "actual" incoming signal?
I am fairly new to analog design and I'm trying to design an amplifier circuit that amplifies signals in the mV range (to also give output signals in the mV range, so low gain). This signal is being fed to expensive equipment (much, much, much more expensive than the amplifier circuitry) and I don't want to damage this. At the same time, I can't introduce significant errors into the signals that give me an amplified signal that is not representative of the original signal. I also need to quantitatively account for these errors.
Thanks!
Best Answer
1) Yes. The usual way to handle this for an AC signal is to construct the feedback so that it has unity gain at DC, and your required higher gain above your minimum signal frequency. That way, only 1x the input offset voltage gets onto the output, rather than gain times.
2) The problem with bias current is that the resistance of the DC path attached to either input must be low enough to source this current, without developing excessive voltage drop. Think of input bias current as being due to current sinks at the input terminals, these are biasing the bases of the input transistors. If the input AC signal is AC coupled, then the R to ground at the input needs to be small enough.
3) Yes, as for input offset voltage, but multiplied by those R to ground input resistors.
You don't want to damage the equipment you are feeding into. It doesn't matter what filtering or feedback you use in your amplifier to control gains and offsets, you must assume that at some point, your amplifier output will hit the rails. If the equipment you are feeding will be damaged by that, then you must take additional steps to protect it.
One solution is to run your amplifier from low enough voltage rails that output saturation will be OK.
Another good solution is to use a pair of anti-parallel silicon diodes to ground after a suitable current limiting resistor from your output. This will clip the output voltage to +/- 0.7v from ground, and allow a signal of +/- 500mV or so with minimal distortion or gain error.
simulate this circuit – Schematic created using CircuitLab
Not all of these AC coupling components are required, but I've shown them all to discuss what they do. Depending on the DC level of your source, the DC input requirements of the thing you're driving, your amplifier offsets and required system gain, none to all of these will be useful.
a) Input AC coupling, R1C1, prevents any input DC reaching the opamp.
b) Feedback AC coupling, R2C2, gives unity gain at DC, and high frequency gain of 11. Any input offsets appear at the output without the gain that the signal has. With a gain as low as 11, typical input offsets are unlikely to be a problem at the output, even if that gain is not rolled off at DC.
c) Output AC coupling, C3R4, removes any amplifier output DC from the final output.
d) The input bias currents will flow through R1 and R3, generating an offset voltage across these resistors. These voltages balance each other and do not create an amplifier output offset. For the amplifier shown which is FET input, these will be very low, and even megohm values for these resistors would be OK. With a bipolar input amplifier, values like this would be more appropriate.
e) The input offset current is the difference between the input currents. The difference in voltage generated on R1 and R3 does cause an output offset.
f) You may for input filtering or gain bandwidth reasons want R1 and R3 to be different values. This mismatch will generate an output offset voltage with the input bias current, but it will rarely be a problem, especially if you can AC couple the output.
g) Output protection of R5D1D2 limits the output voltage to around +/- 700mV, R1 limits the current into the diodes to something they and the amplifier can handle. This form of output protection will only work if +/-700mV is safe for your load, +/- 500mV signal level is adequate (600mV signals will start to get seriously distorted), and R1 is not so big that it limits output current excessively into the load, or its stray capacitance. If all of these are not met, you will need to do something more clever.