From the driver to the gates, the wires are ~15cm. Does this cause rining?
Almost certainly, and it's a fair bet that this is destroying your MOSFETs, by one or more of these mechanisms:
- exceeding \$V_{G(max)}\$ even for the briefest instant
- exceeding \$V_{DS(max)}\$
- simple overheating due to slow switching and unintended conduction
#3 should be pretty obvious when it occurs, but the other two can be hard to see, since they are transient conditions that may be too brief to be visible on the scope.
C2 and C3 are not decreasing the ringing. You get ringing on the gates because the capacitance of the MOSFET gate (and C2, C3 which add to it) plus the inductance formed by the loop of wire through the driver and the MOSFET gate-source form an LC circuit. The ringing is caused by energy bouncing between this capacitance and inductance.
You should put the driver absolutely as close to the MOSFETS as possible. 1cm is already getting to be too long. Not only does the inductance created by the long trace to the gate cause ringing, but it limits your switching speed, which means more losses in the transistors. This is because the rate of change of current is limited by inductance:
$$ \frac{v}{L} = \frac{di}{dt} $$
Since \$v\$ is the voltage supplied by the gate driver and you can't make that any bigger, the time it takes to increase the current from nothing to something is limited by the inductance \$L\$. You want the current to be as much as possible, as soon as possible, so that you can switch that transistor fast.
In addition to putting the gate driver close to the MOSFETs, you want to minimize the loop area of the path the current through the gate must take:
simulate this circuit – Schematic created using CircuitLab
The inductance is proportional to the area illustrated.
The inductance limits the switching speed, and it also limits how well the gate driver can hold the MOSFET off. As the drain voltage on the MOSFET that just turned off changes (due to the other MOSFET turning on, and the mutual inductance of the coils), the gate driver must source or sink current as the internal capacitances of the MOSFET charge or discharge. Here's an illustration from International Rectifier - Power MOSFET Basics:
In your case, if the gate traces are long, then \$R_G\$ is also an inductor. Since the inductor limits \$di/dt\$, the gate driver can only respond so quickly to these currents, and then there is significant ringing and overshoot in the resonance between the gate trace inductance and the MOSFET's capacitance. Your C2 and C3 just serve to change the frequency of this resonance.
As the gate voltage is ringing, it sometimes crosses over \$V_{th}\$ of your MOSFETS, and one begins to conduct a little when it should be off. This changes the current and voltage of the connected inductor, which is coupled to the other inductor, which introduces these capacitive currents in the other MOSFET, which can only exacerbate the problem. But, when the coils aren't powered, then the drain voltage is at 0V regardless of the transistor switching, and these capacitive currents (and consequently, the total gate charge that must be moved to switch the transistor) are much less, so you see much less ringing.
This inductance can also be coupled magnetically to other inductances, like your solenoid coils. As the magnetic flux through the loop changes, a voltage is induced (Faraday's law of induction). Minimize the inductance, and you will minimize this voltage.
Get rid of C2 and C3. If you still need to reduce ringing after improving your layout, do that by adding a resistor in series with the gate, between the gate and the gate driver. This will absorb the energy bouncing around which causes the ringing. Of course, it will also limit the gate current, and thus your switching speed, so you don't want this resistance to be any larger than absolutely necessary.
You can also bypass the added resistor with a diode, or with a transistor, to allow for turn-off to be faster than turn-on. So, one of these options (but only if necessary; it's much preferred to simply eliminate the source of the ringing):
simulate this circuit
Especially in the last case with Q3, you have essentially implemented half of a gate driver, so the same concerns of keeping the trace short and the loop area small apply.
Driving with TTL is a bad idea. At 4D drive the IRFZ44 is only guaranteeing to pass 250 micro amps. You need to follow the guidelines in the spec: -
The spec says it has a test to check rise times and fall times - they use a 10V pulse with an output impedance of 12 ohms.
You cannot expect to get anywhere near this performance from TTL at 4 or 5V. The gate input capacitance is 1.5nF and this needs something like a 1 or 2A drive (off the top of my head) to get the device to switch on and off at the rate you are likely wanting.
EDIT to include drive current into the gate.
It's easiest to start off with Q = CV then differentiating we get \$\dfrac{dQ}{dT} = C\dfrac{dV}{dT}\$ where
\$\dfrac{dQ}{dt}\$ equals charging current into the gate capacitor of 1.5nF.
The voltage on the gate needs to change about 10V in 20 ns hence \$\dfrac{dV}{dt}\$ = 500,000,000.
Therefore charging current (to be supplied by gate drive) is 1.5 \$\times 10^{-9} \times 500,000,000 = 0.75A\$. This means your driver ought to be able to deliver 1 or 2A as previously mentioned.
Best Answer
There are many losses associated with switching, but it sounds like you are most concerned about the additional thermal load introduced into the MOSFETs in the period transitioning between on and off. I thought it would be easy to find some application notes on this, but surprisingly it wasn't. The best I found was AN-6005 Synchronous buck MOSFET loss calculations with Excel model from Fairchild, the relevant parts of which I'll summarize here.
During the switching transition, the voltage and current in the MOSFET will look approximately like this:
The switching losses we are going to calculate are those in periods \$t2\$ and \$t3\$ due to the voltage and current in the MOSFET. The way to approach this is to calculate the energy of each transition, then convert this into an average power according to your switching frequency.
If you look at just \$t2\$, \$V\$ is nearly constant, and \$I\$ increases approximately linearly, forming a triangle. Thus, the power also increases linearly, and the total energy is the time integral of power. So the energy is just the area of that triangle:
$$ E_{t2} = t_2 \left( \frac{V_{in} I_{out}}{2} \right) $$
\$t3\$ also forms a triangle. In this case, the voltage is changing instead of the current, but still the power makes a triangle, and the calculation of energy is the same.
Since the calculation is the same for \$t2\$ and \$t3\$, then it's not really important how much time is spent in \$t2\$ vs \$t3\$; all that really matters is the total time spent switching. The energy losses from one switch are thus:
$$ E_{switch} = (t_2 + t_3) \left( \frac{V_{in} I_{out}}{2} \right) $$
And, your switching frequency is how many times per second you incur this energy loss, so multiplying the two together gets you the average power loss due to switching:
$$ P_{switch} = f (t_2 + t_3) \left( \frac{V_{in} I_{out}}{2} \right) $$
So, taking your calculation of the switching period being \$150ns\$, and the maximum current being \$330A\$, and the voltage \$12V\$, and the switching frequency \$30kHz\$, the power losses from switching are:
$$ 30kHz \cdot 150ns \left( \frac{12V \cdot 330A}{2} \right) = 8.91W $$
That's \$8.91W\$, ideally, shared between three transistors, so only about \$3W\$ each, which is pretty insignificant compared to your other losses.
This number can be checked for sanity with a simpler model: if you spent \$150ns\$ switching, and you do it \$30000\$ times per second, then you can calculate the fraction of the time you spend switching, and make the most pessimistic assumption of the full power of \$12V\cdot330A\$ being lost in the transistors:
$$ \require{cancel} \frac{150 \cdot 10^{-9} \cancel{s}}{\cancel{switch}} \frac{30 \cdot 10^3 \cancel{switches}}{\cancel{s}} \cdot 12V \cdot 330A = 17.82W $$
Of course, over the switching period, the average current and voltage is only half that of the maximum, so the switching losses are half this, which is what we just calculated.
However, I bet in practice, your switching times will be slower. A "\$2A\$ gate driver" isn't a constant current source as these calculations assume. The real picture is rather more complicated than this simple model. Additionally, the current will be limited by the resistance, and usually more significantly, the inductance of the transistor packages and the traces leading to them.
Let's just say the inductance of the gate driver, transistor package, and traces to it is \$1\mu H\$. If your gate drive voltage is \$12V\$, then \$di/dt\$ is limited to \$12V/1\mu H = (1.2\cdot 10^7)A/s\$. This may seem like a lot, but on the time scale of \$150ns\$, it's not. Keeping the inductance low will take some very careful layout.
So, I would say that these calculations show that your switching losses may be manageable, though you won't know for sure until you've made the layout and tested it. Even if you can't reach the ideal of a \$150ns\$ switching time, the losses are low enough relative to your other problems that you have some margin to do worse and still function.
Your bigger problem is probably getting the three MOSFETs to switch at the same time. Otherwise, one of them will get a disproportionate share of the total current, and thus heat, leading to premature failure.