Electronic – PCB layout: am I doing local power nets correctly

This split up arrangement would help from noise traveling between the modules?

If you have multiple power voltages and a 4-layer board you don't have much choice. You have to deliver different voltages to the different loads. Whether it reduces or increases noise has a lot to do with the details of how you lay it out, it's not possible to just give a blanket answer to this question. Better to look at it as, you have to split your power plane --- what's the best way to do that?

Would pouring up ground copper in the top and bottom sides help reduce EMI noise external to the board?

It can, if you provide multiple vias to connect the outer layer ground area to the ground plane. It will also make your fab vendor happy because it will reduce the amount of copper they have to etch to make your board.

Be careful of bringing the outer-layer ground too close to your 2.4 GHz traces because if it's closer than, say, 5 tracewidths it will change the characteristic impedance of your controlled-impedance line.

Would be better to also split up the ground plane (and NO ground pouring on top and bottom sides to avoid a loop), and connect it in a star fashion? I heard that is better to keep the ground plane whole, but everyone seems to have his own version.

Short answer: no.

If you pay special attention to how you split up the power plane, and if your circuit demands it, then there are cases where it can improve things.

But if you want a single answer from somebody who knows almost nothing about the circuit you're designing, then the best answer is not to split the ground plane.

One more thing to watch for

Your stack up is signal-ground-power-signal. With splits in the power plane.

When you route on the bottom layer, try not to cross the splits in the power plane, because those bottom layer traces will actually be using the power net, not ground, as the return path for high-frequency components of the signal.

Also, be careful of (high-speed) signals jumping from top to bottom layer, because this will also require a transition of the return current from the power net to the ground net. This return current will probably pass through the nearest decoupling capacitor --- so the second best thing is to put a decoupling capacitor near each place where return current needs to cross between planes. (Best thing is not cross between planes at all).

Edit

I am making sure all the HF signals don't cross splits, but there are a few DC tracks which unavoidably cross them. Can that be a problem?

Think about this: when you say it's a dc track, do you mean the voltage doesn't change or the current doesn't change? Current changes are what causes problems with running over a split. (Voltage changes are problem only because they usually cause current changes)

So it depends if you're talking about a "dc" signal like an enable line for a power supply that's turned on once at start-up and then left at the same voltage forever, or a power track for some extra rail that wasn't worth making a split for.

A DC control signal will be no problem.

If it's a power signal with a varying load current, you can fix the problem with decoupling capacitors. A decoupling capacitor allows the high-frequency changes of the current to come through the short path through the capacitor instead of the long path through the track.

I'm not sure that I know the best way to build the board, but I know what I would do.

1. The location of the 12V-to-5V regulator, whether linear or switching, will not matter. The corner of the board is fine.
2. I would not bother with filling either top or bottom of the board with ground planes. The impedance of the signal traces is defined by the internal planes, not the extra copper you pour on the outside. The extra coper isn't shielding internal signals, all that is underneath are power and ground planes. Instead, connect ground and power pins of components directly, as close as possible to the pin, to the planes.
3. Don't share power and ground vias between different devices. One via per pin minimises noise on the pin and routing distance to the ground plane. If you are so worried about the manufacturing price that a few vias are going to be significant, you must be shipping in very high volume, so you can prototype a dozen different layouts to optimise it. If this is a one-off, the biggest cost risk is that you don't get it right first time, so be conservative and use lots of vias.
4. Put a via by every component ground pin (not necessarily every component signal pin that happens to need routing to ground). Minimum noise on power and ground planes comes from effective decoupling. High frequency noise is minimised by using physically small ceramic capacitors and keeping the power and ground vias close together - underneath the capacitor, if possible. The cross sectional area of the loop from power plane up through via to capacitor, along capacitor and down through via to ground plane, places the lower limit on how effective the decoupling is.
5. I would definitely not put any splits in the ground plane. Instead, if there are analog signals sensitive to noise, I would not route digital signals close to them. I would try and keep those sensitive analog signals just on the top layer if possible, no vias to the bottom at all. If I can isolate an area of sensitive connections all together on the top layer, I would route a single loop of trace all round there on the top layer, and connect that loop at one point with a via to the ground plane. That approach has worked well for me in the past with very sensitive signals.

And finally: it is conceivable that some clever technique of sharing ground connections might help noise in the analog wiring, but you'd need to know the exact circuit and think very hard about it to be confident. These rules of thumb have worked pretty well for me.

Good Luck!