Input resistance (1.5T\$\Omega\$ typical) is the *change* in input current for *change* in input voltage

\$R_{in}\$ = \$\frac {\Delta V_{in}}{\Delta I_{in}}\$

It is not clear whether this figure is intended to apply to differential input voltage or to common mode voltage or both.

Input current (10pA typical) is the current flowing into or out of the input pin.

If the input was an ideal current source, the input current would be constant so the input impedance would be infinite.

You can model the input (at DC) as a 1.5T ohm resistor to the other input (probably, given the disposition of the input protection diodes) and two +/-10pA current sources, one connected to each input.

Some op-amps (the ancient CA3140 is not one of them) have a rather high input resistance when the two inputs are close to each other in voltage but nonlinear networks across the inputs that turns into k-ohms if you apply more than a diode drop differentially. Not a problem in normal op-amp applications, but problematic if you're using it in applications where it might saturate (precision comparator, some precision rectifier circuits etc.).

Please remember that when using sim.okawa-denshi.jp it is up to you to know how to properly create the topology in question. It is ill advised to create a Sallen-Key topology with a gain greater than 2 because it tends to oscillate. In fact, the page itself even states (after typing in your numbers) that it will oscillate at a frequency of 401.949Hz. If you require more gain then please create another stage that focuses on that.

Edit: Even better, I noticed that you Q-factor and your Damping factor are both negative. That is a sure indication that you will have oscillatory behavior.

As a suggestion, please use the calculation that asks for fc, gain, and provide either the Q-factor or damping ratio. This will provide you with a more stable set-up (real op amps often require additional components for stability).

## Best Answer

At DC \$\omega = 0\$ (all capacitors can be seen as open circuit) we have this situation:

^{simulate this circuit – Schematic created using CircuitLab}And $$R_{IN_{DC}} = R_3 + R_4 = 3k\Omega $$

But at high frequency (\$\omega = ∞\$) when all capacitors can be seen as short circuits we have this situation:

^{simulate this circuit}Therefore the input resistance is now equal to:

$$R_{IN_{HF}} = \left[R_1 \times\left(1 + \frac{R_4}{R_3}\right)\right]||(R_3+R_4) = 3k\Omega||3k\Omega = 1.5k\Omega$$

Why? because now the voltage across \$R_1\$ resistor is no longer equal to \$V_{IN}\$ but to the difference between \$V_{IN}\$ and op-amp output voltage. And the op-amp is working as a voltage follower, meaning that the op-amp output voltage is the same as the input voltage (at non-inverting input). And the input voltage is the output voltage produced by the voltage divider build around \$R_3, R_4\$.