Electronic – Separating Two High Speed Digital ICs

Now that question will open a can of worms! Basically, there is no way to accurately answer that question because there are so many factors involved. That being said...

The "quick" answer is that I wouldn't be concerned until the signal frequencies get near 1 MHz. Between 1 and 10 MHz I would be extra careful. And above 10 MHz I would have a PCB made. Of course there are exceptions, and this is what I would do, etc. But as a rough order of magnitude place to start, it works.

There are many issues involved with this, and I'll try to cover them here...

As others have stated, it's not the signal frequency but the rise/fall time of the signal edges. If you can slow down the edges (but not too much) then you'll have an easier time. FPGA's are great for this because you can change the slew rate and drive strength of the I/O Pins. In a synchronous system, this is more important on the clock lines than the data lines (I'm not saying that data isn't important, however.)

While doing proper signal termination is important, you can't do signal termination without knowing the characteristic impedance of the wire. And in a breadboard type system you won't know what the impedance is, no matter how hard you try. In this case, you'll simply end up twiddling with it until it just happens to work.

Pay attention to the signal return paths and loop currents. This is going to play the biggest part in making the system run fast. Of course, this is damn near impossible to do correctly with a breadboard, but those are the breaks. This is why people use power/gnd planes and 4+ layer PCB's.

I've ran PCIe (2.5 GHz) over wire-wrap-wire for about 5 inches. And I've ran PCIe over a "commercially available" wire for 12 inches. So you can get good performance from wire. It's all in how you use it.

A good breadboard can probably run faster than a bad 2-layer PCB.

Of course, most modern parts are in packages that require a PCB.

Looks like you are thinking many good thoughts and I can't say any of your points are counterproductive when coupled with careful layout.

As for other techniques, maybe it's worth taking a look at the bigger picture. Here are some ideas for that.

• When using 24 bit resolution (that is a LOT of resolution) for bio signals, you are often really using this for common mode/DC offset where the real signal resolution is only maybe 5-8 bits. There are other ways of achieving both high common mode rejection (instrumentation/differential amplifiers) and DC offset (Right-Leg-Drive) etc.

• Bio signals are often very low frequency, so low-pass filtering at the inputs can reduce the noise pickup.

• The very high impedance nature of typical bio signals results in very low currents. This makes the cable sensitive to noise. If you can shorten the cable, use shielded cables or bring the impedance down (by using an active electrode instead of a passive electrode), that can improve the situation.

As a final note: Think about where you want the return currents to run. That is the key to low voltage/low current design. Make sure you are not sharing the signals return current path with any other currents.