I have a Xilinx CPLD design that I'm not using all of the pins in, however, I have reserved some for future use and bonded them out to a microcontroller. I am defining my pinout in a constraint (UCF) file. I want to set all the unused and unconnected pins to GND, but I want to set all the unused pins connected to the microcontroller to PULLUP (for fear that the microcontroller accidentally drives one of those pins high, giving a dead short to GND). I know how to set the default setting of all unused pins to either GND or PULLUP. I need to know how to set the output termination state of the pins if they differ from the global setting for unused pins (as the do in case of the pins connected to the microcontroller). I tried adding a line to the constraints file for them, but ISE warns me and then optimizes them out as they are not connected to any logic internally, and (according to the software) not needed. Is there a way I can set certain unused pins to a specific state that is not the globally prescribed state by using the constraints file? Another method (I'd prefer the UCF file as that means I don't have to add manufacturer-specific VHDL attributes to my code)?
Electronic – Setting single unused pin in Xilinx ISE
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Best Answer
You want them to output low, so go ahead and make them outputs in your VHDL. Then they won't get optimized out.
A single net called "RESERVED(xx downto 0)" would do it. Tie it low in your VHDL, and constrain it to the unused pins just as you would any other signal.
This is the most portable way, really.