An assumption need to be made which you may wish to clarify. If you want 20 mV at UP TO 100 mA then none of the circuits will work without both a current control and voltage control function. The following circuits deal with current control. These can be used to feed a standard 20 mV voltage regulator circuit. If Iload is < Icurrent_limit then the VR works as desired. If Iload tries to exceed current limit then VR is starved of current. So ...
Your circuit will work but is relatively low quality - it depends on the Vbe of Q2 being well defined - which it tends not be be.Steven says that the top transistor needs more than 20 mV Vbe, which is true BUT if you set the current of choice and IF the load drops 20 mV at that current then Q1 will assume whatever Vce is required to drop 20 mV across the load.
Original circuit. Not marvellous -
Much better are circuits similar to the one below from here.
I've modified this slightly but left their values in place as this is to give an idea only.
The system turns Q3 on until V_Rsense = Vref.
So I_constsnt-current = Vref/Rsense.
Vref can be divided from some input voltage as shown using a divide ratio to suit. . You can provide a variable voltage from a pot or a microcontroller etc if desired to vary the current. Note that this is a current sink with the load being supplied from some V+ of choice. Need not be the same V+ as Vcc = BPS+
https://www.google.co.nz/search?q=current+source&hl=en&safe=off&prmd=imvns&tbm=isch&tbo=u&source=univ&sa=X&ei=K2P6T_iZEOijiAfU4JjlBg&ved=0CGAQsAQ&biw=1536&bih=864
Similar but with MOSFET and uC drive
This is similar but uses the voltage across R1 to provide a high side current source. From here but he says it's copied from "The art of electronics". Note again that Vref is the HIGH side voltage across R1.
ie Icc = Vref / R2 = [V+ x R1/(R1+R3)] / R2
Some thoughts from Maxim from here.
Many related thoughts from all over
As Madmanguruman says, the capacitor is in the wrong place.
The opamp is trying to keep the voltages on it's inverting input the same as the non-inverting input, which is 240mV in your example above. To do this with just Rsense present, it must keep 480mA flowing through Rsense as you say.
Now, with the cap in series, it will actually work to charge the capacitor as you have it. However, the catch is that it will not be at a constant current, and the cap will only charge to 240mV, since this it what the opamp needs to keep the balance.
The cap does not pass DC, so the current is initially 480mA, and drops exponentially down to 0 as the voltage rises (and the voltage across the resistor drops)
Another thing to understand here is that a simulation is only as real as you make it, and in some cases the ideal components cause problems. It's quite common for the simulator not to converge or produce odd results if there is no DC path available. Also with a transient simulation, you sometimes need initial conditions set to observe a process.
For example, if I simulate the above circuit in LTSpice with an ideal 1F capacitor, the simulation does not converge (never finishes) If I add a high value of parallel resistance (10MΩ, this is actually very conservative for such a large value, probably be much lower) to provide a DC path, and (very roughly) simulate real world imperfect capacitor leakage, the simulation works:
Simulation:
The 240mV is produced by the 24nA across the 10MΩ resistance (24e-9 * 10e6 = 0.24V) However, the cap starts the simulation at 240mV. Is this what will happen in real life? It's unlikely, so we need to simulate things as it will be when power is switched on, or at least with the cap starting with 0V across it. The reason this happens (in SPICE at least) is because there is an initial DC operating point simulation done before the transient simulation starts.
If we do the same simulation with an initial condition specified, we can see the "interesting" bit that happens prior to reaching a steady state:
So remember to be aware of the difference between ideal and real world components. If simulation results appear strange, then try adding some ESR/ESL (equivalent series resistance/inductance) and parallel resistances to simulations that correspond with the components you intend to use (datasheet will give values usually)
Also be aware of tolerances, for which monte carlo simulation is very useful.
Finally, here is the circuit with the cap placed in the right place, (although you may want high side current limiting in your final circuit):
Simulation of current through cap and voltage across it, notice the constant 480mA up until the cap is fully charged to 4.8V (initial condition used again to see the cap charging):
One last thing, make sure you do not use the LM741 in your final circuit, it's completely obsolete. Choose a decent general purpose rail to rail input/output opamp (rail to rail means it can swing all the way to each rail at the output and handle voltages up to each rail at the input, many opamps, including the 741, cannot do this - another departure from the convenient world of ideal components)
Best Answer
Your typical double transistor current limiter may be your best bet. Shown below is the top-side and bottom side versions.
simulate this circuit – Schematic created using CircuitLab
Note there is a penalty of about a volt drop with this circuit.
Buy dual transistors in a single 6 pin package.
The small resistor will cause the current to fold back when it reaches Vbe. The other resistor sets the base current and needs to be calculated to produce sufficient collector current taking into account Hfe.
HOWEVER: Be aware that transistor needs to handle a few watts for the duration of the short since it only limits the current to your threshold value.