Electronic – sine wave in FPGA

ddsfpgaintel-fpga

I am supposed to generate a sine wave in cyclone 2 altera? I get that I have to store the values in LUT or some memory. I think cyclone 2 uses a 4 input LUT. I am not sure how I should go on with the next step. How do I give or feed the values and Is there a way to store more values than a single LUT can hold? DAC interface?

For example, SIN is often implemented as a table lookup. If 10 bit angles are good enough resolution, then the whole function can be implemented as a lookup table with 1024 entries. (Actually in the case of SIN, only 1/4 cycle is stored then negated or indexed backwards depending on the actual quadrant, but that is a aside specific to SIN).

I got this from one of the older answers. But what is the 10 bit angle resolution? I guess they are using 1024 samples for 1/4 cycle. Is that right?

Best Answer

There are three ways todo this (forth listed for completeness) and it comes downto space-time tradeoffs:

Do you do the calculations ahead of time (storage space) or do you do the calculations on the fly (time tradeoff)

1) Look up table. Do the calculations ahead of time & store the information in a ROM/table. By realising you only have to store 1/4 of the waveform can decrease the amount you need to store. However... depending on the accuracy & the number of steps can lead to a very large table

2) Interpolated LUT. A tradeoff between a lookup table and full calculations. Take advance of the change between entries might be well within accepted errors. Sometimes only 3 points are required (NOTE: 3point example is for atan only)

3) CORDIC. (COordinate Rotation DIgital Computer). Basically a hunting algorithm which can be reduced to simple add's and shifts. The accuracy is pretty much governed by the number of computational steps

4) Full taylor expansion. If accuracy is paramount, speed is imporant but local storage isn't an option

My advice. Look into a CORDIC. There are plenty of example cordics in VHDL and an FPGA is perfect for a CORDIC. A project I am working on at the moment heavily uses cordic's (12bit, 14 cycles to settle)

Example cordic in python

#http://code.activestate.com/recipes/576792-polar-to-rectangular-conversions-using-cordic/
def to_polar(x, y):
    'Rectangular to polar conversion using ints scaled by 100000. Angle in degrees.'
    theta = 0
    for i, adj in enumerate((4500000, 2656505, 1403624, 712502, 357633, 178991, 89517, 44761)):
        sign = 1 if y < 0 else -1
        x, y, theta = x - sign*(y >> i) , y + sign*(x >> i), theta - sign*adj
    return theta, x * 60726 // 100000

def to_rect(r, theta):
    'Polar to rectangular conversion using ints scaled by 100000. Angle in degrees.'
    x, y = 60726 * r // 100000, 0
    for i, adj in enumerate((4500000, 2656505, 1403624, 712502, 357633, 178991, 89517, 44761)):
        sign = 1 if theta > 0 else -1
        x, y, theta = x - sign*(y >> i) , y + sign*(x >> i), theta - sign*adj
    return x, y

#if __name__ == '__main__':
#    print(to_rect(471700, 5799460))     # r=4.71700  theta=57.99460
#    print(to_polar(250000, 400000))     # x=2.50000  y=4.00000

Notes on CORDICS and FPGA's http://www.uio.no/studier/emner/matnat/ifi/INF5430/v12/undervisningsmateriale/dirk/Lecture_cordic.pdf

Related Topic