Electronic – SRAM vs DRAM against single-event upsets

memoryradiationram

SRAM basically stores a bit in a flip-flop made of a few transistors, while DRAM stores a bit in a capacitor driven by a single transistor.

Would this mean that SRAM is less likely to face single-event upsets because it would require more energy to cause a bit flip, hence more reliable?

Best Answer

The most significant factor is the physical (die) size of the transistor geometries (smaller means less SEU energy required to trigger them) and then the number of them (more devices/area = higher susceptibility). So really, reliability per bit is more related to how many bits per silicon area.

If reliability is a concern, always include ECC and design the system & software for good error checking & graceful error handling.