The SMA connectors are expected to be used for clock IO. However, the board already has oscillator and the PLLs can be used to generate a variety of clock frequencies. Besides, for any daughter board connected to the extender socket or the HSMC interface, the clock signal can be sent via the connector itself. Why then would someone need to use these SMA connectors?
- Electronic – Vivado : constraints setup for SPI interface with common clock
- Electronic – Are connectors and pin outs standardised by the MIPI alliance? [Also can anyone name this connector]
- Electronic – Are FPGA Mezzanine Card (FMC) interfaces supposed to be compatible across different FPGA boards
- Electronic – What features should/must be present inside a prototype FPGA board to aid in debug
- Electronic – Using PLLs inside FPGAs