Electronic – The intuition behind RS flip-flop

flipflop

I'm struggling to wrap my mind behind the concept of RS flip-flop. For me, the diagram seems very non-intuitive.
Whenever I accept, for example, that Q is HIGH and follow signal route (is it even correct to say so?) I come to a logical contradiction (say, NOT Q being also HIGH).
Could you please share some knowledge and enlighten me?

Best Answer

I think that your confusion comes from treating the output identifiers Q and /Q literally.

As Curd says, if both S and R are held high (in Oli's diagram), both Q and /Q will be simultaneously low. So from a purely logical perspective, the assumption that the outputs are Q and /Q must be wrong.

It is better to label the outputs of two-gate SR latches as Q and Q', with Q' = /Q except when S = R = 1.

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