Can poor PCB fabrication process / assembly, and the type of solder used cause thermal EMF (seebeck on PCB) problem? Is it affected by the type of the material used? For example, quality of plating, vias, use of different metals such as gold, tin, copper etc?
Electronic – Thermal EMF (seebeck effect) on PCBs
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Some key things to look for:
Delivery time. Many low cost fabs require several weeks to schedule and build your boards. Three-day turn-arounds cost much more.
Will they respect your requirements (fab notes), or just build to a standard set of tolerances and specs? Many low cost vendors severely limit what they will accept in fab notes.
Quality. Do you trust this shop to build your board right the first time, or is there a chance they'll mess it up and have to re-do it, causing a delay?
Lower-level materials. Are they buying the actual laminate materials from high quality vendors or just whatever's cheapest at the moment. (Does your application need the higher-quality material?) Will they use the same material for every lot? If they're just buying at lowest cost, the product is likely to vary from lot to lot.
Support. Are they providing engineering support to review your design and catch mistakes (mostly your layout mistakes) before you spend money on the fab.
Test. Are they providing 100% connectivity testing on the boards after manufacturing?
Certifications. Can the provide UL 94V-0 fire resistance certification on your boards?
Capacity. When your prototype works and you're ready to build 1000, 10,000, or 100,000 boards per month, can they support you?
Capability. Do you need 3/3 space/trace, gold plating, thin dielectrics, impedance control, microvias, etc., etc? Higher-technology designs need higher-cost equipment to build and more attention to detail when building them.
Obviously it depends on your project which of these qualities are worth paying extra for.
Should I care the plating? I noticed different processes using tin/gold/Pb and etc.
Traditional tin/lead is easier to work with for hand assembly, but can't be legally used in products you want to sell in Europe, China and probably some other countries.
Pure tin coating is a reasonable alternative to tin/lead if you can't use tin/lead.
Another option is organic solderability preservative (OSP) over bare copper. This is common for volume production.
Gold is useful for corrosion resistance if you are making an edgecard connector, or if you will be wirebonding to a chip-on-board component. Different gold-plating processes are generally used in these two situations. If you need to know the difference, it's worth opening a separate question about it.
If you are hand-assembling your boards and in the USA, tin-lead is probably your best choice.
How could I know the quality of a PCB?
Measuring the quality of PCBs is pretty involved. Most defects happen when you try to push to the limits of technology (3 mil traces, 6 mil vias, 0.5-mm BGA pads, etc). If you are only working at low volumes and with forgiving design rules (8/8 or larger), you aren't likely to run into quality issues, even with low-cost vendors.
Back when I did board design more actively, typical process was purported to be:
- pre-bonded (not plated-on) copper on board material (from outside suppliers)
- drill
- art onto photo-resist
- etch/clean/remove resiston inner layers.
- stack layers (and pray that they don't spin one on you)
- at some point in here mill the edge of the board to the correct shape.
- electroless (nickel? or copper?) to get some metal in the drilled holes so that plating could work.
- plating to get more copper in the drilled holes and connect the layers/traces at each drilled hole. Plating with tin or tin/lead to reduce tarnish issues.
- Etch the outer layers here, or after next step...
- Possibly masking and additional nickel and gold plating if there were gold contacts. Talk about your hefty upcharges.
- Solder resist.
- Silkscreen.
Actually, it may be that they only drilled the registration holes (which may or may not end up on the final board) before etching and bonding, and drilled all the component holes AFTER etching and bonding.) I do distinctly remember a probelmatic layout (by a fancypants outside contractor with CAD!) where the registration holes for one layer were off by 0.050 inches so the holes were not always catching full copper on that layer.
Never visited a fab house, but I designed a few boards and checked a lot more (including good old 4x photo-reduction art - who-hoo!) as well as making my own single-layer stuff. Multi-layer we sent out.
So, missing from your list would be stacking and bonding layers, and plating the through holes. On your list but I don't think it happens is plating on the copper in the first place - as far as I know it was and is a copper sheet/foil that is bonded to the substrate. In some cases it might be built up by additional plating for a hefty upcharge, but mostly it's not. Cheaper and faster to use 2 oz foil than to plate 1 oz up to 2 oz.
Solder mask was, as far as I know, silkscreened on just like the silkscreen layer - but this is also pre-SMT days so that might well be different now that things have to be more precise. Wave soldering was state of the art and all pins were at least 2.54 mm apart.
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Best Answer
The Seebeck effect is always there, and has nothing to do with the quality of the PCB fabrication process. Copper is copper, and exhibits a certain Seebeck effect.
Unless you have a very sensitive low-level analog circuit, the Seebeck effect can be ignored on a normal circuit board.
First, for there to be a voltage offset due to the Seebeck effect, there has to be a thermal gradient. The whole PCB at the same temperate won't cause any offsets, regardless of what the temperature is.
Second, even with thermal gradients across the board, the offset is 0 over any loop of copper traces. Whatever offset voltage is caused along the gradient to a different temperature going out, is offset by the reverse gradient coming back to the starting temperature.
Third, the offset voltages due to the Seebeck effect are small. Copper generates about 6.5 µV/°C. Even if one side of a board is 50 °C hotter than the other, that only causes 325 µV offset. And again, you generally can't sense that even if you wanted to because this cancels out in a loop.
Thermocouples exploit the Seebeck effect by using two different materials out and back. The voltage offset seen at the electronics at room temperature is the difference between that generated by the two materials across the temperature difference.
The most common reason for considering the Seebeck effect on a circuit board is when designing thermocouple receivers. Since a thermocouple measures the difference in temperature, not the absolute temperature, you have to know the temperature of the junction where the thermocouple wires are connected to copper traces on your board. Those two junctions also need to be at the same temperature.
In high-accuracy thermocouple receiver circuits, this is usually done by keeping the two junctions physically close and clamping a copper bar across them. The copper is electrically insulated from the junctions, but thermally connected as best as possible. Since copper is a good thermal conductor, the two junctions will hopefully be very close in temperature to each other, and to the absolute temperature sensor on the board that is used as the reference temperature.