Electronic – Transmission (TX) halts using FTDI 232RL with ATmega328-PU

FTDI seems to be a popular forum topic, but I can't seem to find an answer to a confounding issue I have. I'll try to give as many details as I can, since I can't seem to narrow down the issue.

I am using an ATmega328-PU (the cheaper problem-child for ArduinoISP users) with an FTDI 232-RL Breakout Board. I was able to burn the Arduino bootloader using the breakout board with no problem, as well as load the sketch I am using.

Now, I am trying to use the FTDI serial com port from my PC to interface with the 328. The only pins I am running from the breakout board to my board are the TX, RX and GND pins. I am using a Baud Rate from my serial port of 115200.

Symptoms: the RX indicator flashes consistently, so it's getting lots of happy bits from the PC. The TX indicator flashes for about 1 second, then quits. No happy bits from FTDI to ATmega328.

I have no reset button on my 328 circuit, just a resistor to +5V. I have a 16MHz external clock in my circuit. I have attached my sketch's setup code for additional reference.

Now, the questions:

1) Do I need to do anything with the CTS and DTR pins coming from the breakout board?

2) Is there an internal clock still on the ATmega328 that's screwing me up (even after the bootloader? If so, how would I go about disabling it?

3) Is there a need for a reset button in my circuit if the sketch is already loaded?

Hopefully someone can shed some light onto my issue. Much appreciated!

Here's the setup code (after declaring pins on 328):

void setup()   
{               
  DDRB |= (1<<1)  | (1<<2)  | (1<<3) | (1<<5) ; // BLANK, SS, MOSI, SCLK as OUTPUTS
  DDRD |= (1<<3)  | (1<<4) |  (1<<6) | (1<<7) ; // VPRG, XLAT, GSCLK, Debug as OUTPUTS
  DDRC = 255;

  XLAT_Low;
  BLANK_High;
  VPRG_Low;
  Debug_Low;

  //Timer 1 (16bit)
  TCCR1A  = (1<<WGM11) | (0<<WGM10);            // Fast PWM with ICR1 as top
  TCCR1B  = (1<<WGM13) | (1<<WGM12);            // Fast PWM with ICR1 as top
  TCCR1B |= (1<<CS12)  | (1<<CS11) | (1<<CS10); // external clock (T1) on rising egde
  TIMSK1 |= (1<<TOIE1);                         // enable overflow interupt
  ICR1    = Gray_Scale_Depth;                   // Grey scale depth for TLC-PW

  //Timer 0 (8bit)
  TCCR0A  = (1<<WGM01) | (0<<WGM00);            // CTC
  TCCR0A |= (0<<COM0A1) | (1<<COM0A0);          // Toggle on Compare Match
  TCCR0B  = (0<<CS02) | (0<<CS01) | (1<<CS00);  // No Prescaler
  OCR0A   = 0;                                  // f(OCR) = F_CPU/2/Prescaler

  //UART Initialisation
  UCSR0A |= (1<<U2X0);                                 // Double up UART
  UCSR0B |= (1<<RXEN0)  | (1<<TXEN0) | (1<<RXCIE0);    // UART RX, TX und RX Interrupt enable
  UCSR0C |= (1<<UCSZ01) | (1<<UCSZ00)             ;    // Asynchrous 8N1 
  UBRR0H = 0;
  UBRR0L = 1; //Baud Rate 1 MBit   --> 0% Error at 16MHz

  //Enable global interrupts
  sei();

  //Configure SPI  
  SPCR = (1<<SPE)|(1<<MSTR);  
  SPSR = B00000000;   

  ptr=display_buffer;

}