Electronic – Trying to find out the voltage threshold for input of a GPIO pin in an FPGA development board

datasheetfpgaintel-fpgaio

I need to use a camera module along with De1-SoC development board. Camera requires 3.3V to work and it provides outputs with a 2.5V output pin.

I am trying to find what is the range of voltages that the FPGA will detect. I can not find that information easily anywhere in the specifications or any datasheets. This is the only official help I have found in the DE1-SoC User Manual. If the detection range for '0' is 0V-1.5V, and for '1' is 2.2V-5V I should be able to just plug the camera straight to the FPGA. Otherwise I would need to add additional voltage shifters.

If someone could point me to where I can find information regarding the official input detection characteristics I would be very grateful.

This is the link to the De1-Soc manual, and this is cyclone V manual from which I am too trying to fish out that information.

Best Answer

Cyclone V pins are configurable for numerous different standards. Look into Cyclone V Device Handbook Vol.1 in chapter 5. Specifially, JEDEC Standard JESD8-5 (that is "2.5V low voltage CMOS") is supported.

From the De1-SOC-Schematics (download CD.zip from Terasic) you can see, that all banks have \$VCC_{IO}=3.3V\$ (except the HPS-banks which use \$1.5V\$). Pins on these banks will correctly detect 2.5V CMOS input (see "I/O Standards Voltage Levels"), but they will not be able to generate 2.5V output.

In general, Alteras Device Handbook (at least Vol.1) is a recommended read, if you want to put your board to use.