Electronic – use a photodiode as a switch for a shift register

You are right. Edge triggering is just a much narrower form of level triggering, and depends on timing. Inside an edge-triggered device, the changing clock edge is just turned into a pulse which causes it to accept the inputs: a level trigger! But the level trigger is very short. It must be so short that the outputs are not able to propagate back to the input to do any harm in the time that the edge-triggered pulse appears and disappears.

Edge triggering would not work if signals propagated instantly through wires and had unlimited slew rates.

Also note that clocks can be divided into phases to solve problems where this isn't fast enough.

A master-slave flip-flop is an example of clock phasing. It splits the clock signal into two phases by reacting to both rising edges and falling edges, but differently. Input is accepted on a rising edge into an input latch, and then on a falling edge propagated into a second latch where it produces output.

To answer your specific question, most flip-flops in general, and the flip-flops used in shift registers in particular, have a minimum clock-to-output propogation time. What this means is that the output won't change state for a certain amount of time after each clock edge, and this time is greater than the maximum input hold time of the next flip-flop.

In most cases, each flip-flop is designed so that the required input hold time is in fact zero. And no flip-flop has a minimum clock-to-output delay that is less than zero.

When you connect flip-flops in series to deal with potential metastability, even if the first one goes metastable, it can't immediately case the second one to go metastable; the metastability must persist for a clock period before it could potentially make the second one go metastable as well.