Let's say I want to use an nMos FET in a low side switching circuit as follows:

^{simulate this circuit – Schematic created using CircuitLab}

Datasheet for IRF530 here.

Now, during my education in EE, I have learnt some operation regions for MOSFETs and formulas for drain current related to these regions. And one parameter *Kn* which was the key parameter shows up in everywhere.

But now, I am having hard time in my calculations, because, there is not a *Kn* value in the datasheets of such MOSFETs. If it were present, what I would do is:

(For Vgs = high case, SW1 is closed)

- Assume an operation region for the nMOS, I start with SAT generally
- Use Idsat formula for the SAT region.
`Idsat = Kn/2*(Vgs-Vtn)^2`

- Find the drain voltage using
`Vd = Vdd - Rload * Idsat`

- Check if
`Vds >= Vgs - Vtn`

or not, if so, assumption for SAT is validated, if not, then MOSFET is in linear region, since it cannot be in cut-off

This was working great while doing it on paper, however, now in reality, I am stuck how to approach this kind of a design using the information present in datasheets.

I'm not able to make any comments on the operation region of the MOSFET because I cannot guess drain voltage without any information about drain current flowing through the circuit.

So, what I am asking is something like the followings:

- In which operation region a MOSFET should be operated for switching applications?
- For ON(mosfet conducts) part of the operation, what should I replace MOSFET with? Rds(on)? Or a voltage difference between source and drain? How should I decide whether I can directly replace the MOSFET with a resistance of Rds(on) or not. What criterias do I have to satisyf for it to act as an almost short circuit when it is ON.

And as an extra, if anyone knows, an answer to the following would be nice:

Why *Kn* is not present in these datasheets while it is heavily used in theoretical calculations, at least in my college education?

## Best Answer

If you look in the data sheet, figure 1 will give you a lot of information: -

With a \$V_{GS}\$ of 4.5 volts and a drain current of 1 amp, the MOSFET will be dropping about 1 volt. So if the supply voltage is 10 volts and the load were 9 ohms you'd get 9 volts across the load and 1 volt dropped between drain and source.

If \$V_{GS}\$ was 5 volts you can see that with a 1 amp load current, the volt drop is only 0.2 volts hence a 9.8 ohm load on a 10 volt supply would see around 9.8 volts across it with the MOSFET only losing 0.2 volts.

If \$V_{GS}\$ was 15 volts a ten amp drain current would only drop typically 0.9 volts.

I never try and replace the MOSFET with a single figure for RDS(on) because it just doesn't give me the full story - I always look at the data in the graph above.

The graph above depicts that - for an NMOS both voltage and current are positive.

When operating the MOSFET with a "reduced gate drive" you have to be aware of the temperature coefficients that can cause thermal runaway. See this graph below from the IRF530: -

I've marked on the graph the ZTC point - this means the zero temperature coefficient point and basically it means that with a gate source voltage below circa 5.7 volts, there is a possibility that as the device warms up, it's drain current will increase causing more warming and hence more drain current and therefore thermal runaway.

For instance, at a gate drive of 4 volts, the drain current will be typically 0.1 amps and, if the

~~power supply~~drain-source voltage is (say) 10 volts, the MOSFET power dissipation will be 1 watt and this will warm the MOSFET causing more drain current heading towards 1.2 amps on the graph. Now the MOSFET is dissipating 12 watts and rapidly heading to heaven. It will self-destruct without a heatsink.So, if a switching application is being targeted use a MOSFET gate drive voltage greater than 5.7 volts plus a safety margin.