Electronic – VCC trace routing on a two-layer board with TQFP chip

Think of the high frequency currents that are running accross the ground plane.

At low frequencies, the current follows the path of least resistance (literally). A island in the ground plane isn't much of a issue in terms of resistance. There is still plenty of copper on either side of the island so that the current can flow around it with little voltage drop.

However, things look different at high frequencies. The high frequency return currents in the ground plane tend to follow the same path as the forward currents on the other layers. This is a useful property since it minimizes the total current loop area, and thereby it radiates less and the loop is also less susceptible to incoming radiation. Islands in the ground plane force currents to go around them, which may significantly increase the loop area of high frequency currents. Looking at this another way, you can think of the conductors on the top layer as forming a transmission line with the ground plane. Island break this transmission line, which increases the impedance, which increases the voltage drop accross the ground plane.

Another effect is something known as a "slot antenna". This is the inverse of a dipole, but behaves just like a dipole for radiating and receiving. If you have high frequency current running down the length of a conductive sheet and then cut a slot in that sheet perpendicular to the current flow, you have a slot antenna. This is one reason that air flow holes in metal chassis are usually a bunch of holes, not slots or single large openings.

On a two layer board, you usually have to route some of the signals onto the bottom layer. But, you want to leave the bottom layer a ground plane to the extent possible. From the analysis above, you can see that more small islands is better than few large ones. The metric you want to strive for is to minimize the maximum dimension of any island.

I use Eagle and its auto router often for such things. In the first few routing passes I set the costs just to find a routing solution. In later passes I assume a solution has been found and now it needs to be optimized for least damage to the ground plane. To get that, I set the ground plane layer cost high and the via cost lower. That results in more short "jumpers" in the ground plane layer instead of long traces. Unfortunately Eagle still tends to clump these jumpers together, even with the hugging parameter set to 0. After the final auto route, I manually clean up the ground plane a bit. This is usually not changing the topology, but mostly separating individual jumpers from each other so that there is copper flowing between them.

Here is the bottom layer drawing of such a board:

This shows the bottom layer of our USBProg PIC Programmer. A circuit of that complexity can't be routed on a single layer, but note how there are lots of individual small islands instead of long traces or large clumps of jumpers in the bottom layer. For the most part, the high frequency return currents can still flow without too much deviation from their ideal paths.

The way to handle the analog part is not to split the ground plane (this increases its impedance, which you want to avoid) but to isolate the components and sensitive signal traces so that the analog signals (and their return currents in the ground plane) do not cross other signal paths.

That said, if you're worried about signal integrity or noise (IMHO, that's "yes" for test equipment like an ohmmeter--nothing worse than an instrument that lies to you), go with a 4-layer board. It'll be both easier to route and have better signal quality (Note that with 2-layer, the ground return path is via traces, so if you make the return current go all over the place, your ground will bounce, and there will be no way to repair it.) The most expensive board is the one that doesn't work.