Electronic – Verilog Assignment

verilog

I'm designing a Fahrenheit to Celsius converter using algorithmic state machines. I'm trying to get the following code to run, but all I get for output is 0.

module FtoC(clk, F_input, C_output);
input clk;
input [8:0]F_input;

output [6:0]C_output;
reg [6:0] C_output = 0;

reg [1:0] state =0;
reg [8:0] A, R;


always @ (posedge clk)
case (state)
0: begin state <= 1; C_output <= 0; A <= F_input; R <= 0; end
1: begin state <=2; R <= ({(A - 32), 2'b00} + A); end
2: if (R>9) begin R <= R - 9; C_output <= C_output + 1; end  

       // else state <= 0;

endcase

endmodule

Best Answer

First of all, you need to include your testbench, since it is just as important as your design, especially when things are not working as expected.

Secondly, the R <= ({(A - 32), 2'b00} + A); line is wrong. Like alex.forencich already pointed out, you want (A-32)*5 = 5A-160, but are actually doing (A-32)*4+A = 5A-128, which is not the same.

Instead, R <= ({A, 2'b00} + A) - 160; should work.

For simple simulations, you can use the online simulator edaplayground.com.

Here's a snapshot of your code (using edaplayground) with the correction and a testbench, showing the correct output value of C = 37 when the input is F = 100:

enter image description here

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