Recently I've designed a PCB for the ESP8266EX-chip. With my amount of knowledge, I thought it would be smart to stitch vias into pads. To be specific, not only the ground pad of the chip, but also the small pin-pads (It's a QFN Chip).
After soldering everything using a reflow oven, the PCB wasn't working -> I couldn't upload anything to the chip. So I tried soldering the PCB in a reflow oven without any parts on the solder paste. This time I saw, that the vias suck up almost all solder off of the PCB pads. This could also be an effect because I don't have any parts on the solder paste, but after searching the internet about my problem, it seems that my open vias are the problem.
I tried filling the vias with solder paste, and then putting solder paste on the pads, no success.
Is there a way to make this work? I received 35 boards from a sponsor (couldn't go lower), and it would be incovenient if I have to throw them away.
Soldering using a solder station is not an option, I tried. Looking for a solution on the internet was also not helpful.
Best Answer
To try to mitigate your problem, I would recommend filling your vias, before you place the chips, with standard wire solder and a soldering iron. Make sure you heat everything enough that the flux is all burned out of the hole.
Then, apply the paste, place the chips, and proceed as usual.
Something to be aware of: the "via-in-pad" terminology is used in two different, conflicting ways. It often causes confusion:
First, the phrase is used to describe putting a standard via in a pad (like you did). This is known to cause problems, as you found out.
The other use of the phrase is to use "via-in-pad technology" when manufacturing boards. This is a good thing, which solves the problems you are seeing. The board house will fill the holes with epoxy, then plane them flat, and then plate them. This is what you need when dealing with very-fine-pitch BGAs, for example.
This is an extra processing step done by your board house, and costs extra money. It isn't even an option at some low-price boards houses.
Another attempted solution that is often seen is that a designer will cover the drill hole with soldermask, which creates "tented vias". The idea is that it prevents solder from wicking down into the holes. Unfortunately, this doesn't work well, either.
If the via is tented on the top layer, it lifts the IC up off of the board, leaving a gap. If it is tented on the bottom layer, the vaporizing flux can cause small eruptions, like a volcano, under the chip. These can cause spacing and alignment issues.
So, in summary, VIPs shouldn't be used unless you pay for the good ones :)